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| author | Aya Levin | 2018-10-28 15:22:57 +0100 |
|---|---|---|
| committer | Saeed Mahameed | 2018-12-06 01:00:33 +0100 |
| commit | d930ac796fdb3eed62b0053297a728ced8fd58b1 (patch) | |
| tree | 62f4138a1200bb9d38bf3be56a72c0060d19b09a /drivers/net/ethernet/mellanox/mlx5/core/en/fs.h | |
| parent | net/mlx5e: Move modify tirs hash functionality (diff) | |
| download | kernel-qcow2-linux-d930ac796fdb3eed62b0053297a728ced8fd58b1.tar.gz kernel-qcow2-linux-d930ac796fdb3eed62b0053297a728ced8fd58b1.tar.xz kernel-qcow2-linux-d930ac796fdb3eed62b0053297a728ced8fd58b1.zip | |
net/mlx5e: Refactor TIR configuration function
Refactor mlx5e_build_indir_tir_ctx_hash for better code re-use. TIR
stands for Transport Interface Receive, which is responsible for all
transport related operations on the receive side. Added a
static array with TIR default configuration values. This separates
configuration values from command setting, which is needed for
downstream patch.
Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en/fs.h')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en/fs.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h b/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h index 1431232c9a09..be5961ff24cc 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en/fs.h @@ -73,6 +73,22 @@ enum mlx5e_traffic_types { MLX5E_NUM_INDIR_TIRS = MLX5E_TT_ANY, }; +struct mlx5e_tirc_config { + u8 l3_prot_type; + u8 l4_prot_type; + u32 rx_hash_fields; +}; + +#define MLX5_HASH_IP (MLX5_HASH_FIELD_SEL_SRC_IP |\ + MLX5_HASH_FIELD_SEL_DST_IP) +#define MLX5_HASH_IP_L4PORTS (MLX5_HASH_FIELD_SEL_SRC_IP |\ + MLX5_HASH_FIELD_SEL_DST_IP |\ + MLX5_HASH_FIELD_SEL_L4_SPORT |\ + MLX5_HASH_FIELD_SEL_L4_DPORT) +#define MLX5_HASH_IP_IPSEC_SPI (MLX5_HASH_FIELD_SEL_SRC_IP |\ + MLX5_HASH_FIELD_SEL_DST_IP |\ + MLX5_HASH_FIELD_SEL_IPSEC_SPI) + enum mlx5e_tunnel_types { MLX5E_TT_IPV4_GRE, MLX5E_TT_IPV6_GRE, |