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| author | Aya Levin | 2018-10-23 09:02:08 +0200 |
|---|---|---|
| committer | Saeed Mahameed | 2018-12-05 03:20:01 +0100 |
| commit | 080d1b17fbc51789287cd8b2044a8cc9ec600e81 (patch) | |
| tree | b147e6aa53243f621fedc66fdd98a52680ffb419 /drivers/net/ethernet/mellanox/mlx5/core/en_main.c | |
| parent | net/mlx5e: Cleanup unused defines (diff) | |
| download | kernel-qcow2-linux-080d1b17fbc51789287cd8b2044a8cc9ec600e81.tar.gz kernel-qcow2-linux-080d1b17fbc51789287cd8b2044a8cc9ec600e81.tar.xz kernel-qcow2-linux-080d1b17fbc51789287cd8b2044a8cc9ec600e81.zip | |
net/mlx5e: Move modify tirs hash functionality
Move modify tirs hash functionality (mlx5e_modify_tirs_hash) from
en_ethtool.c to en_main.c. This allows future use of this fuctionality
from en_fs_ethtool.c, while keeping current convention: en_ethtool.c
doesn't have an API. There is no functional change here.
Signed-off-by: Aya Levin <ayal@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_main.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 871313d6b34d..85a4633454d0 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -2735,6 +2735,34 @@ void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_params *params, } } +void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen) +{ + void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx); + struct mlx5_core_dev *mdev = priv->mdev; + int ctxlen = MLX5_ST_SZ_BYTES(tirc); + int tt; + + MLX5_SET(modify_tir_in, in, bitmask.hash, 1); + + for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { + memset(tirc, 0, ctxlen); + mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, + false); + mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen); + } + + if (!mlx5e_tunnel_inner_ft_supported(priv->mdev)) + return; + + for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { + memset(tirc, 0, ctxlen); + mlx5e_build_indir_tir_ctx_hash(&priv->channels.params, tt, tirc, + true); + mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, + inlen); + } +} + static int mlx5e_modify_tirs_lro(struct mlx5e_priv *priv) { struct mlx5_core_dev *mdev = priv->mdev; |