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| author | Huy Nguyen | 2018-02-22 20:22:56 +0100 |
|---|---|---|
| committer | Saeed Mahameed | 2018-05-24 23:23:33 +0200 |
| commit | 2c81bfd5ae5659df44b38ec71c404b4b261a9515 (patch) | |
| tree | beaef7400a3059db6e9b1a772dedf8c1b75758e1 /drivers/net/ethernet/mellanox/mlx5/core/en_main.c | |
| parent | net/dcb: Add dcbnl buffer attribute (diff) | |
| download | kernel-qcow2-linux-2c81bfd5ae5659df44b38ec71c404b4b261a9515.tar.gz kernel-qcow2-linux-2c81bfd5ae5659df44b38ec71c404b4b261a9515.tar.xz kernel-qcow2-linux-2c81bfd5ae5659df44b38ec71c404b4b261a9515.zip | |
net/mlx5e: Move port speed code from en_ethtool.c to en/port.c
Move four below functions from en_ethtool.c to en/port.c. These
functions are used by both en_ethtool.c and en_main.c. Future code
can use these functions without ethtool link mode dependency.
u32 mlx5e_port_ptys2speed(u32 eth_proto_oper);
int mlx5e_port_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
int mlx5e_port_max_linkspeed(struct mlx5_core_dev *mdev, u32 *speed);
u32 mlx5e_port_speed2linkmodes(u32 speed);
Delete the speed field from table mlx5e_build_ptys2ethtool_map. This
table only keeps the mapping between the mlx5e link mode and
ethtool link mode. Add new table mlx5e_link_speed for translation
from mlx5e link mode to actual speed.
Signed-off-by: Huy Nguyen <huyn@mellanox.com>
Reviewed-by: Parav Pandit <parav@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_main.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index b5a7580b12fe..cee44c21766c 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c @@ -46,6 +46,7 @@ #include "accel/ipsec.h" #include "accel/tls.h" #include "vxlan.h" +#include "en/port.h" struct mlx5e_rq_param { u32 rqc[MLX5_ST_SZ_DW(rqc)]; @@ -4082,7 +4083,7 @@ static bool slow_pci_heuristic(struct mlx5_core_dev *mdev) u32 link_speed = 0; u32 pci_bw = 0; - mlx5e_get_max_linkspeed(mdev, &link_speed); + mlx5e_port_max_linkspeed(mdev, &link_speed); pci_bw = pcie_bandwidth_available(mdev->pdev, NULL, NULL, NULL); mlx5_core_dbg_once(mdev, "Max link speed = %d, PCI BW = %d\n", link_speed, pci_bw); |