summaryrefslogtreecommitdiffstats
path: root/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
diff options
context:
space:
mode:
authorEugenia Emantayev2016-08-22 13:57:41 +0200
committerSaeed Mahameed2017-01-19 22:19:54 +0100
commitee7f12205abc21c2e83b266636e27b1cb2fd4e21 (patch)
tree328c120936508de0590ed2395ced5615c8371d22 /drivers/net/ethernet/mellanox/mlx5/core/en_main.c
parentnet/mlx5: Add MTPPS and MTPPSE registers infrastructure (diff)
downloadkernel-qcow2-linux-ee7f12205abc21c2e83b266636e27b1cb2fd4e21.tar.gz
kernel-qcow2-linux-ee7f12205abc21c2e83b266636e27b1cb2fd4e21.tar.xz
kernel-qcow2-linux-ee7f12205abc21c2e83b266636e27b1cb2fd4e21.zip
net/mlx5e: Implement 1PPS support
This patch enables the 1PPS IN and 1PPS OUT support according to the advertised HCA capability. Single pin may be configured to one of the above mutual exclusive functions via standard Linux tools and APIs. For example, testptp open source application. Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en_main.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/en_main.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
index aba3691e0919..2129fbd1d6ca 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c
@@ -317,6 +317,8 @@ static void mlx5e_async_event(struct mlx5_core_dev *mdev, void *vpriv,
enum mlx5_dev_event event, unsigned long param)
{
struct mlx5e_priv *priv = vpriv;
+ struct ptp_clock_event ptp_event;
+ struct mlx5_eqe *eqe = NULL;
if (!test_bit(MLX5E_STATE_ASYNC_EVENTS_ENABLED, &priv->state))
return;
@@ -326,7 +328,15 @@ static void mlx5e_async_event(struct mlx5_core_dev *mdev, void *vpriv,
case MLX5_DEV_EVENT_PORT_DOWN:
queue_work(priv->wq, &priv->update_carrier_work);
break;
-
+ case MLX5_DEV_EVENT_PPS:
+ eqe = (struct mlx5_eqe *)param;
+ ptp_event.type = PTP_CLOCK_EXTTS;
+ ptp_event.index = eqe->data.pps.pin;
+ ptp_event.timestamp =
+ timecounter_cyc2time(&priv->tstamp.clock,
+ be64_to_cpu(eqe->data.pps.time_stamp));
+ mlx5e_pps_event_handler(vpriv, &ptp_event);
+ break;
default:
break;
}