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authorRabie Loulou2018-04-26 15:45:41 +0200
committerSaeed Mahameed2018-12-14 22:28:53 +0100
commit3b5ff59fd851d8e8c7c3ba08b01011baffa60cb6 (patch)
tree292cd9e020bb81c72b63c9b6793682d3617cef59 /drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
parentnet/mlx5e: Duplicate offloaded TC eswitch rules under uplink LAG (diff)
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net/mlx5: Adjustments for the activate LAG logic to run under sriov
When HW lag is set/unset, roce must not be enabled on the port, as such we wrap such changes with roce enable/disable either directly or through re-creation of IB device. Currently, lag and sriov are mutually exclusive, so by definition this code doesn't run under sriov. Towards changing this exclusion, we need to make sure that roce will not be enabled on the eswitch manager port under sriov since this is requirement of the switchdev mode. We are going strict here and avoiding this all together under sriov. Signed-off-by: Rabie Loulou <rabiel@mellanox.com> Reviewed-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/eswitch.h')
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