diff options
| author | Daniel Jurgens | 2018-11-05 23:05:37 +0100 |
|---|---|---|
| committer | Saeed Mahameed | 2018-12-11 23:52:20 +0100 |
| commit | 939de57d30344ce728b0de61be87984e75af420e (patch) | |
| tree | dc42835752a817f639508f23b45b1601fd644861 /drivers/net/ethernet/mellanox/mlx5/core/wq.c | |
| parent | net/mlx5e: Support multiple encapsulations for a TC flow (diff) | |
| download | kernel-qcow2-linux-939de57d30344ce728b0de61be87984e75af420e.tar.gz kernel-qcow2-linux-939de57d30344ce728b0de61be87984e75af420e.tar.xz kernel-qcow2-linux-939de57d30344ce728b0de61be87984e75af420e.zip | |
net/mlx5e: Use CQE padding for Ethernet CQs
Writing 64B CQEs to 128B cache lines results in a RMW operation. Padding
the CQEs to 128B if possible improves performance on 128B cache line
systems like PPC.
Testing on PPC showed up to a 24% improvement in small packet throughput
vs the default behavior, depending on the workload and system topology.
Signed-off-by: Daniel Jurgens <danielj@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/wq.c')
| -rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/wq.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/wq.c b/drivers/net/ethernet/mellanox/mlx5/core/wq.c index 2dcbf1ebfd6a..953cc8efba69 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/wq.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/wq.c @@ -155,7 +155,8 @@ int mlx5_cqwq_create(struct mlx5_core_dev *mdev, struct mlx5_wq_param *param, void *cqc, struct mlx5_cqwq *wq, struct mlx5_wq_ctrl *wq_ctrl) { - u8 log_wq_stride = MLX5_GET(cqc, cqc, cqe_sz) + 6; + /* CQE_STRIDE_128 and CQE_STRIDE_128_PAD both mean 128B stride */ + u8 log_wq_stride = MLX5_GET(cqc, cqc, cqe_sz) == CQE_STRIDE_64 ? 6 : 7; u8 log_wq_sz = MLX5_GET(cqc, cqc, log_cq_size); int err; |