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authorGiuseppe CAVALLARO2012-05-14 00:18:41 +0200
committerDavid S. Miller2012-05-15 00:53:19 +0200
commitcffb13f4d6fb5976f907c37e7fc7f6e6acb10d5f (patch)
tree2778dd1ed389a91e78af991cad051ff5d64821e6 /drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
parentdm9000: some coldfire boards need this (diff)
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stmmac: extend mac addr reg and fix perfect filering
This patch is to extend the number of MAC address registers for 16 to 32. In fact, other new 16 registers are available in new chips and this can help on perfect filter mode for unicast. This patch also fixes the perfect filtering mode by setting the bit 31 in the MAC address registers. v2: fixed Coding Style. Signed-off-by: Gianni Antoniazzi <gianni.antoniazzi-ext@st.com> Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/dwmac1000.h')
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/dwmac1000.h11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
index 54339a78e358..1527f4ecd11a 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac1000.h
@@ -61,9 +61,11 @@ enum power_event {
};
/* GMAC HW ADDR regs */
-#define GMAC_ADDR_HIGH(reg) (0x00000040+(reg * 8))
-#define GMAC_ADDR_LOW(reg) (0x00000044+(reg * 8))
-#define GMAC_MAX_UNICAST_ADDRESSES 16
+#define GMAC_ADDR_HIGH(reg) (((reg > 15) ? 0x00000800 : 0x00000040) + \
+ (reg * 8))
+#define GMAC_ADDR_LOW(reg) (((reg > 15) ? 0x00000804 : 0x00000044) + \
+ (reg * 8))
+#define GMAC_MAX_PERFECT_ADDRESSES 32
#define GMAC_AN_CTRL 0x000000c0 /* AN control */
#define GMAC_AN_STATUS 0x000000c4 /* AN status */
@@ -205,4 +207,7 @@ enum rtc_control {
#define GMAC_MMC_TX_INTR 0x108
#define GMAC_MMC_RX_CSUM_OFFLOAD 0x208
+/* Synopsys Core versions */
+#define DWMAC_CORE_3_40 34
+
extern const struct stmmac_dma_ops dwmac1000_dma_ops;