diff options
| author | Jose Abreu | 2019-07-09 10:02:59 +0200 |
|---|---|---|
| committer | David S. Miller | 2019-07-09 21:20:08 +0200 |
| commit | 06a80a7d09cc3fbecbd44e225e825a37fb806836 (patch) | |
| tree | 07bc940518c6061918757585e39b4940f103a792 /drivers/net/ethernet/stmicro/stmmac/hwif.h | |
| parent | net: stmmac: Implement RX Coalesce Frames setting (diff) | |
| download | kernel-qcow2-linux-06a80a7d09cc3fbecbd44e225e825a37fb806836.tar.gz kernel-qcow2-linux-06a80a7d09cc3fbecbd44e225e825a37fb806836.tar.xz kernel-qcow2-linux-06a80a7d09cc3fbecbd44e225e825a37fb806836.zip | |
net: stmmac: Fix descriptors address being in > 32 bits address space
Commit a993db88d17d ("net: stmmac: Enable support for > 32 Bits
addressing in XGMAC"), introduced support for > 32 bits addressing in
XGMAC but the conversion of descriptors to dma_addr_t was left out.
As some devices assing coherent memory in regions > 32 bits we need to
set lower and upper value of descriptors address when initializing DMA
channels.
Luckly, this was working for me because I was assigning CMA to < 4GB
address space for performance reasons.
Fixes: a993db88d17d ("net: stmmac: Enable support for > 32 Bits addressing in XGMAC")
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/hwif.h')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/hwif.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/hwif.h b/drivers/net/ethernet/stmicro/stmmac/hwif.h index 2acfbc70e3c8..278c0dbec9d9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/hwif.h +++ b/drivers/net/ethernet/stmicro/stmmac/hwif.h @@ -150,10 +150,10 @@ struct stmmac_dma_ops { struct stmmac_dma_cfg *dma_cfg, u32 chan); void (*init_rx_chan)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg, - u32 dma_rx_phy, u32 chan); + dma_addr_t phy, u32 chan); void (*init_tx_chan)(void __iomem *ioaddr, struct stmmac_dma_cfg *dma_cfg, - u32 dma_tx_phy, u32 chan); + dma_addr_t phy, u32 chan); /* Configure the AXI Bus Mode Register */ void (*axi)(void __iomem *ioaddr, struct stmmac_axi *axi); /* Dump DMA registers */ |