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| author | Don Skidmore | 2010-06-29 20:30:59 +0200 |
|---|---|---|
| committer | David S. Miller | 2010-06-30 23:27:40 +0200 |
| commit | cb836a977f71f76ccbb1ff35b9c113ace96377e9 (patch) | |
| tree | b91e2fc048d7f5fb193390f13fd89ef0e7a0b550 /drivers/net/ixgbe/ixgbe_82599.c | |
| parent | sfc: Add support for RX flow hash control (diff) | |
| download | kernel-qcow2-linux-cb836a977f71f76ccbb1ff35b9c113ace96377e9.tar.gz kernel-qcow2-linux-cb836a977f71f76ccbb1ff35b9c113ace96377e9.tar.xz kernel-qcow2-linux-cb836a977f71f76ccbb1ff35b9c113ace96377e9.zip | |
ixgbe: add 1g PHY support for 82599
Add support for 1G SFP+ PHY's to 82599.
Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_82599.c')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_82599.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82599.c b/drivers/net/ixgbe/ixgbe_82599.c index 976fd9e146c6..0ee175a289ee 100644 --- a/drivers/net/ixgbe/ixgbe_82599.c +++ b/drivers/net/ixgbe/ixgbe_82599.c @@ -206,6 +206,14 @@ static s32 ixgbe_get_link_capabilities_82599(struct ixgbe_hw *hw, s32 status = 0; u32 autoc = 0; + /* Determine 1G link capabilities off of SFP+ type */ + if (hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core0 || + hw->phy.sfp_type == ixgbe_sfp_type_1g_cu_core1) { + *speed = IXGBE_LINK_SPEED_1GB_FULL; + *negotiation = true; + goto out; + } + /* * Determine link capabilities based on the stored value of AUTOC, * which represents EEPROM defaults. If AUTOC value has not been @@ -2087,6 +2095,7 @@ static u32 ixgbe_get_supported_physical_layer_82599(struct ixgbe_hw *hw) u32 pma_pmd_1g = autoc & IXGBE_AUTOC_1G_PMA_PMD_MASK; u16 ext_ability = 0; u8 comp_codes_10g = 0; + u8 comp_codes_1g = 0; hw->phy.ops.identify(hw); @@ -2167,11 +2176,15 @@ sfp_check: case ixgbe_phy_sfp_intel: case ixgbe_phy_sfp_unknown: hw->phy.ops.read_i2c_eeprom(hw, + IXGBE_SFF_1GBE_COMP_CODES, &comp_codes_1g); + hw->phy.ops.read_i2c_eeprom(hw, IXGBE_SFF_10GBE_COMP_CODES, &comp_codes_10g); if (comp_codes_10g & IXGBE_SFF_10GBASESR_CAPABLE) physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_SR; else if (comp_codes_10g & IXGBE_SFF_10GBASELR_CAPABLE) physical_layer = IXGBE_PHYSICAL_LAYER_10GBASE_LR; + else if (comp_codes_1g & IXGBE_SFF_1GBASET_CAPABLE) + physical_layer = IXGBE_PHYSICAL_LAYER_1000BASE_T; break; default: break; |