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| author | Ben Hutchings | 2009-10-23 10:30:17 +0200 |
|---|---|---|
| committer | David S. Miller | 2009-10-24 13:27:00 +0200 |
| commit | 625b451455cebb7120492766c8425b6e808fc209 (patch) | |
| tree | 363f5124ee89bdb883f63ce6c30e11fb4b3b4035 /drivers/net/sfc/falcon.c | |
| parent | sfc: Remove versioned bitfield macros (diff) | |
| download | kernel-qcow2-linux-625b451455cebb7120492766c8425b6e808fc209.tar.gz kernel-qcow2-linux-625b451455cebb7120492766c8425b6e808fc209.tar.xz kernel-qcow2-linux-625b451455cebb7120492766c8425b6e808fc209.zip | |
sfc: Move RX data FIFO thresholds out of struct efx_nic_type
Since there are now separate blocks of code to set the thresholds for
each NIC type, it is no longer useful to include them in the NIC type
description.
Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
| -rw-r--r-- | drivers/net/sfc/falcon.c | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c index 4cb98d473c4d..c23e8e2b094a 100644 --- a/drivers/net/sfc/falcon.c +++ b/drivers/net/sfc/falcon.c @@ -2922,16 +2922,17 @@ static void falcon_init_rx_cfg(struct efx_nic *efx) const unsigned ctrl_xon_thr = 20; const unsigned ctrl_xoff_thr = 25; /* RX data FIFO thresholds (256-byte units; size varies) */ - unsigned data_xon_thr = - ((rx_xon_thresh_bytes >= 0) ? - rx_xon_thresh_bytes : efx->type->rx_xon_thresh) >> 8; - unsigned data_xoff_thr = - ((rx_xoff_thresh_bytes >= 0) ? - rx_xoff_thresh_bytes : efx->type->rx_xoff_thresh) >> 8; + int data_xon_thr = rx_xon_thresh_bytes >> 8; + int data_xoff_thr = rx_xoff_thresh_bytes >> 8; efx_oword_t reg; falcon_read(efx, ®, RX_CFG_REG_KER); if (falcon_rev(efx) <= FALCON_REV_A1) { + /* Data FIFO size is 5.5K */ + if (data_xon_thr < 0) + data_xon_thr = 512 >> 8; + if (data_xoff_thr < 0) + data_xoff_thr = 2048 >> 8; EFX_SET_OWORD_FIELD(reg, RX_DESC_PUSH_EN_A1, 0); EFX_SET_OWORD_FIELD(reg, RX_USR_BUF_SIZE_A1, huge_buf_size); EFX_SET_OWORD_FIELD(reg, RX_XON_MAC_TH_A1, data_xon_thr); @@ -2939,7 +2940,11 @@ static void falcon_init_rx_cfg(struct efx_nic *efx) EFX_SET_OWORD_FIELD(reg, RX_XON_TX_TH_A1, ctrl_xon_thr); EFX_SET_OWORD_FIELD(reg, RX_XOFF_TX_TH_A1, ctrl_xoff_thr); } else { - /* Register fields moved */ + /* Data FIFO size is 80K; register fields moved */ + if (data_xon_thr < 0) + data_xon_thr = 27648 >> 8; /* ~3*max MTU */ + if (data_xoff_thr < 0) + data_xoff_thr = 54272 >> 8; /* ~80Kb - 3*max MTU */ EFX_SET_OWORD_FIELD(reg, RX_DESC_PUSH_EN_B0, 0); EFX_SET_OWORD_FIELD(reg, RX_USR_BUF_SIZE_B0, huge_buf_size); EFX_SET_OWORD_FIELD(reg, RX_XON_MAC_TH_B0, data_xon_thr); @@ -3130,8 +3135,6 @@ struct efx_nic_type falcon_a_nic_type = { .max_dma_mask = FALCON_DMA_MASK, .tx_dma_mask = FALCON_TX_DMA_MASK, .bug5391_mask = 0xf, - .rx_xoff_thresh = 2048, - .rx_xon_thresh = 512, .rx_buffer_padding = 0x24, .max_interrupt_mode = EFX_INT_MODE_MSI, .phys_addr_channels = 4, @@ -3154,8 +3157,6 @@ struct efx_nic_type falcon_b_nic_type = { .max_dma_mask = FALCON_DMA_MASK, .tx_dma_mask = FALCON_TX_DMA_MASK, .bug5391_mask = 0, - .rx_xoff_thresh = 54272, /* ~80Kb - 3*max MTU */ - .rx_xon_thresh = 27648, /* ~3*max MTU */ .rx_buffer_padding = 0, .max_interrupt_mode = EFX_INT_MODE_MSIX, .phys_addr_channels = 32, /* Hardware limit is 64, but the legacy |