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authorGustavo Pimentel2018-05-14 17:06:33 +0200
committerLorenzo Pieralisi2018-05-14 18:03:33 +0200
commit2d27ae899856d07db88cf84bf9b1f204bab23e96 (patch)
tree464146654bc8a89dd707687096d2b920df179967 /drivers/pci/dwc/pcie-designware-plat.c
parentPCI: imx6: Remove space before tabs (diff)
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PCI: dwc: Define maximum number of vectors
Add a callback to define the maximum number of vectors used by the RC. Since this is a parameter associated to each SoC IP setting, makes sense to be configurable and easily visible to future modifications. Set DesignWare driver vectors number maximum to 256. Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Acked-by: Jingoo Han <jingoohan1@gmail.com>
Diffstat (limited to 'drivers/pci/dwc/pcie-designware-plat.c')
-rw-r--r--drivers/pci/dwc/pcie-designware-plat.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/pci/dwc/pcie-designware-plat.c b/drivers/pci/dwc/pcie-designware-plat.c
index 5416aa8a07a5..80a2782e9823 100644
--- a/drivers/pci/dwc/pcie-designware-plat.c
+++ b/drivers/pci/dwc/pcie-designware-plat.c
@@ -38,8 +38,14 @@ static int dw_plat_pcie_host_init(struct pcie_port *pp)
return 0;
}
+static void dw_plat_set_num_vectors(struct pcie_port *pp)
+{
+ pp->num_vectors = MAX_MSI_IRQS;
+}
+
static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
.host_init = dw_plat_pcie_host_init,
+ .set_num_vectors = dw_plat_set_num_vectors,
};
static int dw_plat_add_pcie_port(struct pcie_port *pp,