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| author | David Miller | 2008-02-06 10:36:23 +0100 |
|---|---|---|
| committer | Linus Torvalds | 2008-02-06 19:41:01 +0100 |
| commit | f661197e0a95ec7305e1e790d95b72a74a1c4a0f (patch) | |
| tree | a6916d877a3d9db9bc658758bd347d4f436f6d59 /drivers/pci/intel-iommu.h | |
| parent | IPC: fix error check in all new xxx_lock() and xxx_exit_ns() functions (diff) | |
| download | kernel-qcow2-linux-f661197e0a95ec7305e1e790d95b72a74a1c4a0f.tar.gz kernel-qcow2-linux-f661197e0a95ec7305e1e790d95b72a74a1c4a0f.tar.xz kernel-qcow2-linux-f661197e0a95ec7305e1e790d95b72a74a1c4a0f.zip | |
Genericizing iova.[ch]
I would like to potentially move the sparc64 IOMMU code over to using
the nice new drivers/pci/iova.[ch] code for free area management..
In order to do that we have to detach the IOMMU page size assumptions
which only really need to exist in the intel-iommu.[ch] code.
This patch attempts to implement that.
[akpm@linux-foundation.org: build fix]
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers/pci/intel-iommu.h')
| -rw-r--r-- | drivers/pci/intel-iommu.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/pci/intel-iommu.h b/drivers/pci/intel-iommu.h index 459ad1f9dc54..0e4862675ad2 100644 --- a/drivers/pci/intel-iommu.h +++ b/drivers/pci/intel-iommu.h @@ -23,10 +23,24 @@ #include <linux/types.h> #include <linux/msi.h> +#include <linux/sysdev.h> #include "iova.h" #include <linux/io.h> /* + * We need a fixed PAGE_SIZE of 4K irrespective of + * arch PAGE_SIZE for IOMMU page tables. + */ +#define PAGE_SHIFT_4K (12) +#define PAGE_SIZE_4K (1UL << PAGE_SHIFT_4K) +#define PAGE_MASK_4K (((u64)-1) << PAGE_SHIFT_4K) +#define PAGE_ALIGN_4K(addr) (((addr) + PAGE_SIZE_4K - 1) & PAGE_MASK_4K) + +#define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT_4K) +#define DMA_32BIT_PFN IOVA_PFN(DMA_32BIT_MASK) +#define DMA_64BIT_PFN IOVA_PFN(DMA_64BIT_MASK) + +/* * Intel IOMMU register specification per version 1.0 public spec. */ |