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| author | Mika Westerberg | 2017-10-23 14:40:25 +0200 |
|---|---|---|
| committer | Linus Walleij | 2017-10-31 10:10:24 +0100 |
| commit | cf769bd86bccf210e4063540634a7abf2b99581f (patch) | |
| tree | 6c06654adb6c4e62657ade0ac697f92961247c1b /drivers/pinctrl/intel/pinctrl-intel.h | |
| parent | pinctrl: sunxi: Enforce the strict mode by default (diff) | |
| download | kernel-qcow2-linux-cf769bd86bccf210e4063540634a7abf2b99581f.tar.gz kernel-qcow2-linux-cf769bd86bccf210e4063540634a7abf2b99581f.tar.xz kernel-qcow2-linux-cf769bd86bccf210e4063540634a7abf2b99581f.zip | |
pinctrl: intel: Make offset to interrupt status register configurable
Some GPIO blocks have the interrupt status (GPI_IS) offset different
than it normally is, so make it configurable. If no offset is specified
we use the default.
While there remove two unused constants from the core driver.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/intel/pinctrl-intel.h')
| -rw-r--r-- | drivers/pinctrl/intel/pinctrl-intel.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pinctrl/intel/pinctrl-intel.h b/drivers/pinctrl/intel/pinctrl-intel.h index 7fdb07753c2d..13b0bd6eb2a2 100644 --- a/drivers/pinctrl/intel/pinctrl-intel.h +++ b/drivers/pinctrl/intel/pinctrl-intel.h @@ -73,6 +73,8 @@ struct intel_padgroup { * @hostown_offset: Register offset of HOSTSW_OWN from @regs. If %0 then it * is assumed that the host owns the pin (rather than * ACPI). + * @is_offset: Register offset of GPI_IS from @regs. If %0 then uses the + * default (%0x100). * @ie_offset: Register offset of GPI_IE from @regs. * @pin_base: Starting pin of pins in this community * @gpp_size: Maximum number of pads in each group, such as PADCFGLOCK, @@ -98,6 +100,7 @@ struct intel_community { unsigned padown_offset; unsigned padcfglock_offset; unsigned hostown_offset; + unsigned is_offset; unsigned ie_offset; unsigned pin_base; unsigned gpp_size; |