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| author | Andrew Jeffery | 2019-06-28 04:38:35 +0200 |
|---|---|---|
| committer | Linus Walleij | 2019-07-03 10:35:00 +0200 |
| commit | 0290eba96be4325ad567b7e4e682ce3c937c9b7c (patch) | |
| tree | b51bf99bd26c37dbbbc0fb2f370412357fde66c3 /drivers/pinctrl | |
| parent | MAINTAINERS: Add entry for ASPEED pinctrl drivers (diff) | |
| download | kernel-qcow2-linux-0290eba96be4325ad567b7e4e682ce3c937c9b7c.tar.gz kernel-qcow2-linux-0290eba96be4325ad567b7e4e682ce3c937c9b7c.tar.xz kernel-qcow2-linux-0290eba96be4325ad567b7e4e682ce3c937c9b7c.zip | |
pinctrl: aspeed: Correct comment that is no longer true
We have handled the GFX register case for quite some time now.
Cc: Johnny Huang <johnny_huang@aspeedtech.com>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Acked-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20190628023838.15426-6-andrew@aj.id.au
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/aspeed/pinctrl-aspeed.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.h b/drivers/pinctrl/aspeed/pinctrl-aspeed.h index d4d7f032c1da..f3ee28a24d8c 100644 --- a/drivers/pinctrl/aspeed/pinctrl-aspeed.h +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.h @@ -244,8 +244,7 @@ * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions * reference registers beyond those dedicated to pinmux, such as the system * reset control and MAC clock configuration registers. The AST2500 goes a step - * further and references registers in the graphics IP block, but that isn't - * handled yet. + * further and references registers in the graphics IP block. */ #define SCU2C 0x2C /* Misc. Control Register */ #define SCU3C 0x3C /* System Reset Control/Status Register */ |