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| author | Vadim Pasternak | 2018-11-15 18:26:54 +0100 |
|---|---|---|
| committer | Darren Hart (VMware) | 2018-12-11 02:49:15 +0100 |
| commit | 59e96ec85e8e59170f6d5cba028e199a2e5dfe67 (patch) | |
| tree | 656649967e87e78107c648d42dfd1c4ba11e5c3f /drivers/platform/x86/mlx-platform.c | |
| parent | platform/x86: intel_telemetry: convert to DEFINE_SHOW_ATTRIBUTE (diff) | |
| download | kernel-qcow2-linux-59e96ec85e8e59170f6d5cba028e199a2e5dfe67.tar.gz kernel-qcow2-linux-59e96ec85e8e59170f6d5cba028e199a2e5dfe67.tar.xz kernel-qcow2-linux-59e96ec85e8e59170f6d5cba028e199a2e5dfe67.zip | |
platform/x86: mlx-platform: Add definitions for new registers
Add definitions for new registers:
- CPLD3 version - next generation systems are equipped with three CPLD;
- Two reset cause registers, which store the system reset reason (like
system failures, upgrade failures and so on;
Signed-off-by: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Darren Hart (VMware) <dvhart@infradead.org>
Diffstat (limited to 'drivers/platform/x86/mlx-platform.c')
| -rw-r--r-- | drivers/platform/x86/mlx-platform.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/platform/x86/mlx-platform.c b/drivers/platform/x86/mlx-platform.c index c2c3a1a19879..63edab558970 100644 --- a/drivers/platform/x86/mlx-platform.c +++ b/drivers/platform/x86/mlx-platform.c @@ -49,7 +49,10 @@ #define MLXPLAT_CPLD_LPC_REG_BASE_ADRR 0x2500 #define MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET 0x00 #define MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET 0x01 +#define MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET 0x02 #define MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET 0x1d +#define MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET 0x1e +#define MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET 0x1f #define MLXPLAT_CPLD_LPC_REG_LED1_OFFSET 0x20 #define MLXPLAT_CPLD_LPC_REG_LED2_OFFSET 0x21 #define MLXPLAT_CPLD_LPC_REG_LED3_OFFSET 0x22 @@ -1208,7 +1211,10 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg) switch (reg) { case MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET: case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET: case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET: case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET: case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET: case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET: @@ -1258,7 +1264,10 @@ static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg) switch (reg) { case MLXPLAT_CPLD_LPC_REG_CPLD1_VER_OFFSET: case MLXPLAT_CPLD_LPC_REG_CPLD2_VER_OFFSET: + case MLXPLAT_CPLD_LPC_REG_CPLD3_VER_OFFSET: case MLXPLAT_CPLD_LPC_REG_RESET_CAUSE_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE1_OFFSET: + case MLXPLAT_CPLD_LPC_REG_RST_CAUSE2_OFFSET: case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET: case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET: case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET: |