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| author | Kuppuswamy Sathyanarayanan | 2017-06-05 21:08:06 +0200 |
|---|---|---|
| committer | Lee Jones | 2017-06-19 16:45:30 +0200 |
| commit | 94d68594a7b4fd2eec457f22110de644e1c4ee57 (patch) | |
| tree | e27b55b9d345ab66cb9b893c04ef151a6dec756b /drivers/platform | |
| parent | mfd: intel_soc_pmic_bxtwc: Use chained IRQs for second level IRQ chips (diff) | |
| download | kernel-qcow2-linux-94d68594a7b4fd2eec457f22110de644e1c4ee57.tar.gz kernel-qcow2-linux-94d68594a7b4fd2eec457f22110de644e1c4ee57.tar.xz kernel-qcow2-linux-94d68594a7b4fd2eec457f22110de644e1c4ee57.zip | |
platform/x86: intel_bxtwc_tmu: Remove first level IRQ unmask
Currently in WCOVE PMIC MFD driver, all second level IRQ chips
are chained to the respective first level IRQs. So there is no
need for explicitly unmasking the first level IRQ in this
driver. This patches removes this level 1 IRQ unmask support.
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Darren Hart (VMware) <dvhart@infradead.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/platform')
| -rw-r--r-- | drivers/platform/x86/intel_bxtwc_tmu.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/platform/x86/intel_bxtwc_tmu.c b/drivers/platform/x86/intel_bxtwc_tmu.c index e202abd5b0df..ea865d4ca220 100644 --- a/drivers/platform/x86/intel_bxtwc_tmu.c +++ b/drivers/platform/x86/intel_bxtwc_tmu.c @@ -92,10 +92,6 @@ static int bxt_wcove_tmu_probe(struct platform_device *pdev) } wctmu->irq = virq; - /* Enable TMU interrupts */ - regmap_update_bits(wctmu->regmap, BXTWC_MIRQLVL1, - BXTWC_MIRQLVL1_MTMU, 0); - /* Unmask TMU second level Wake & System alarm */ regmap_update_bits(wctmu->regmap, BXTWC_MTMUIRQ_REG, BXTWC_TMU_ALRM_MASK, 0); |