diff options
| author | Thierry Reding | 2014-07-11 11:13:30 +0200 |
|---|---|---|
| committer | Thierry Reding | 2014-07-17 14:58:42 +0200 |
| commit | 24fa5af81059af90c723bec6aacc3cd2b2809d14 (patch) | |
| tree | 237415a8a7af0c683d68f10c9fd1957965fbc3b4 /drivers/soc | |
| parent | ARM: tegra: Always lock the CPU reset vector (diff) | |
| download | kernel-qcow2-linux-24fa5af81059af90c723bec6aacc3cd2b2809d14.tar.gz kernel-qcow2-linux-24fa5af81059af90c723bec6aacc3cd2b2809d14.tar.xz kernel-qcow2-linux-24fa5af81059af90c723bec6aacc3cd2b2809d14.zip | |
soc/tegra: fuse: Set up in early initcall
Rather than rely on explicit initialization order called from SoC setup
code, use a plain initcall and rely on initcall ordering to take care of
dependencies.
This driver exposes some functionality (querying the chip ID) needed at
very early stages of the boot process. An early initcall is good enough
provided that some of the dependencies are deferred to later stages. To
make sure any abuses are easily caught, output a warning message if the
chip ID is queried while it can't be read yet.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/soc')
| -rw-r--r-- | drivers/soc/tegra/fuse/fuse-tegra.c | 11 | ||||
| -rw-r--r-- | drivers/soc/tegra/fuse/tegra-apbmisc.c | 7 |
2 files changed, 14 insertions, 4 deletions
diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c b/drivers/soc/tegra/fuse/fuse-tegra.c index 03742edcfe83..11a5043959dc 100644 --- a/drivers/soc/tegra/fuse/fuse-tegra.c +++ b/drivers/soc/tegra/fuse/fuse-tegra.c @@ -23,6 +23,7 @@ #include <linux/of_address.h> #include <linux/io.h> +#include <soc/tegra/common.h> #include <soc/tegra/fuse.h> #include "fuse.h" @@ -125,11 +126,14 @@ int tegra_fuse_create_sysfs(struct device *dev, int size, return device_create_bin_file(dev, &fuse_bin_attr); } -void __init tegra_init_fuse(void) +static int __init tegra_init_fuse(void) { struct device_node *np; void __iomem *car_base; + if (!soc_is_tegra()) + return 0; + tegra_init_apbmisc(); np = of_find_matching_node(NULL, car_match); @@ -139,7 +143,7 @@ void __init tegra_init_fuse(void) iounmap(car_base); } else { pr_err("Could not enable fuse clk. ioremap tegra car failed.\n"); - return; + return -ENXIO; } if (tegra_get_chip_id() == TEGRA20) @@ -153,4 +157,7 @@ void __init tegra_init_fuse(void) tegra_sku_info.core_process_id); pr_debug("Tegra CPU Speedo ID %d, Soc Speedo ID %d\n", tegra_sku_info.cpu_speedo_id, tegra_sku_info.soc_speedo_id); + + return 0; } +early_initcall(tegra_init_fuse); diff --git a/drivers/soc/tegra/fuse/tegra-apbmisc.c b/drivers/soc/tegra/fuse/tegra-apbmisc.c index bfc1d54ac4ad..3bf5aba4caaa 100644 --- a/drivers/soc/tegra/fuse/tegra-apbmisc.c +++ b/drivers/soc/tegra/fuse/tegra-apbmisc.c @@ -38,9 +38,12 @@ u32 tegra_read_chipid(void) u8 tegra_get_chip_id(void) { - u32 id = tegra_read_chipid(); + if (!apbmisc_base) { + WARN(1, "Tegra Chip ID not yet available\n"); + return 0; + } - return (id >> 8) & 0xff; + return (tegra_read_chipid() >> 8) & 0xff; } u32 tegra_read_straps(void) |