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authorSowjanya Komatineni2019-04-05 02:14:05 +0200
committerMark Brown2019-04-05 05:22:22 +0200
commitf0a0bc90c6e7060778911c2b55d085105809d6cf (patch)
treee02a5753a83665ec5ff20c6532fc66fb69c99308 /drivers/spi/spi-tegra114.c
parentspi: tegra114: dump SPI registers during timeout (diff)
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spi: tegra114: set supported bits per word
Tegra SPI supports 4 through 32 bits per word. This patch sets bits_per_word_mask accordingly to support transfer with these bits per word. Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-tegra114.c')
-rw-r--r--drivers/spi/spi-tegra114.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c
index 99019f6d2d84..c2ebf1ae632d 100644
--- a/drivers/spi/spi-tegra114.c
+++ b/drivers/spi/spi-tegra114.c
@@ -1151,6 +1151,7 @@ static int tegra_spi_probe(struct platform_device *pdev)
/* the spi->mode bits understood by this driver: */
master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
+ master->bits_per_word_mask = SPI_BPW_RANGE_MASK(4, 32);
master->setup = tegra_spi_setup;
master->transfer_one_message = tegra_spi_transfer_one_message;
master->num_chipselect = MAX_CHIP_SELECT;