diff options
| author | Greg Kroah-Hartman | 2010-10-08 20:05:47 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2010-10-08 20:05:47 +0200 |
| commit | 66cbd3ab35d35580ddf98304c280a6231685aa41 (patch) | |
| tree | 64a55ec99419a0cd9a1114588964d15a5c1ad3a1 /drivers/staging/brcm80211/phy/wlc_phy_lcn.h | |
| parent | Staging: bcm: silence off by one warning (diff) | |
| download | kernel-qcow2-linux-66cbd3ab35d35580ddf98304c280a6231685aa41.tar.gz kernel-qcow2-linux-66cbd3ab35d35580ddf98304c280a6231685aa41.tar.xz kernel-qcow2-linux-66cbd3ab35d35580ddf98304c280a6231685aa41.zip | |
Staging: brcm80211: s/uint32/u32/
Use the kernel types, don't invent your own.
Cc: Brett Rudley <brudley@broadcom.com>
Cc: Henry Ptasinski <henryp@broadcom.com>
Cc: Nohee Ko <noheek@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/staging/brcm80211/phy/wlc_phy_lcn.h')
| -rw-r--r-- | drivers/staging/brcm80211/phy/wlc_phy_lcn.h | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/staging/brcm80211/phy/wlc_phy_lcn.h b/drivers/staging/brcm80211/phy/wlc_phy_lcn.h index 83351d8d4bd5..2b3bbdb71d0a 100644 --- a/drivers/staging/brcm80211/phy/wlc_phy_lcn.h +++ b/drivers/staging/brcm80211/phy/wlc_phy_lcn.h @@ -27,7 +27,7 @@ struct phy_info_lcnphy { bool lcnphy_recal; u8 lcnphy_rc_cap; - uint32 lcnphy_mcs20_po; + u32 lcnphy_mcs20_po; u8 lcnphy_tr_isolation_mid; u8 lcnphy_tr_isolation_low; @@ -69,17 +69,17 @@ struct phy_info_lcnphy { s8 lcnphy_tx_power_idx_override; u16 lcnphy_noise_samples; - uint32 lcnphy_papdRxGnIdx; - uint32 lcnphy_papd_rxGnCtrl_init; + u32 lcnphy_papdRxGnIdx; + u32 lcnphy_papd_rxGnCtrl_init; - uint32 lcnphy_gain_idx_14_lowword; - uint32 lcnphy_gain_idx_14_hiword; - uint32 lcnphy_gain_idx_27_lowword; - uint32 lcnphy_gain_idx_27_hiword; + u32 lcnphy_gain_idx_14_lowword; + u32 lcnphy_gain_idx_14_hiword; + u32 lcnphy_gain_idx_27_lowword; + u32 lcnphy_gain_idx_27_hiword; s16 lcnphy_ofdmgainidxtableoffset; s16 lcnphy_dsssgainidxtableoffset; - uint32 lcnphy_tr_R_gain_val; - uint32 lcnphy_tr_T_gain_val; + u32 lcnphy_tr_R_gain_val; + u32 lcnphy_tr_T_gain_val; s8 lcnphy_input_pwr_offset_db; u16 lcnphy_Med_Low_Gain_db; u16 lcnphy_Very_Low_Gain_db; |