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author | Mike Marciniszyn | 2015-11-10 01:13:58 +0100 |
---|---|---|
committer | Greg Kroah-Hartman | 2015-11-20 01:55:37 +0100 |
commit | 0a226edd203f1209e4ee6e07a6b41a9cfd8beeb8 (patch) | |
tree | 61ec5424ebca8146ea7e832761fefc875c1f6f76 /drivers/staging/rdma/hfi1/chip.c | |
parent | staging/rdma/hfi1: move hfi1_migrate_qp (diff) | |
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staging/rdma/hfi1: Use parallel workqueue for SDMA engines
The workqueue is currently single threaded per port which for a small number of
SDMA engines is ok.
For hfi1, the there are up to 16 SDMA engines that can be fed descriptors in
parallel.
Use alloc_workqueue with a workqueue limit of the number of sdma engines and
with WQ_CPU_INTENSIVE and WQ_HIGHPRI specified.
Then change send to use the new scheduler which no longer needs to get the
s_lock
Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com>
Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/rdma/hfi1/chip.c')
-rw-r--r-- | drivers/staging/rdma/hfi1/chip.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/staging/rdma/hfi1/chip.c b/drivers/staging/rdma/hfi1/chip.c index d858f36042b5..0b07b364f666 100644 --- a/drivers/staging/rdma/hfi1/chip.c +++ b/drivers/staging/rdma/hfi1/chip.c @@ -9044,6 +9044,7 @@ static int request_msix_irqs(struct hfi1_devdata *dd) if (handler == sdma_interrupt) { dd_dev_info(dd, "sdma engine %d cpu %d\n", sde->this_idx, sdma_cpu); + sde->cpu = sdma_cpu; cpumask_set_cpu(sdma_cpu, dd->msix_entries[i].mask); sdma_cpu = cpumask_next(sdma_cpu, def); if (sdma_cpu >= nr_cpu_ids) |