summaryrefslogtreecommitdiffstats
path: root/drivers/staging/rdma/hfi1/chip.c
diff options
context:
space:
mode:
authorDean Luick2015-12-01 21:38:18 +0100
committerGreg Kroah-Hartman2015-12-21 22:51:55 +0100
commit11a5909b26942683d5ec7e6810054a36d5a6ee67 (patch)
tree696e892d3a08fc9db0ca109eb9629bc93532a516 /drivers/staging/rdma/hfi1/chip.c
parentstaging/rdma/hfi1: Add a credit push on diagpkt allocate fail (diff)
downloadkernel-qcow2-linux-11a5909b26942683d5ec7e6810054a36d5a6ee67.tar.gz
kernel-qcow2-linux-11a5909b26942683d5ec7e6810054a36d5a6ee67.tar.xz
kernel-qcow2-linux-11a5909b26942683d5ec7e6810054a36d5a6ee67.zip
staging/rdma/hfi1: Correctly limit VLs against SDMA engines
Correctly reduce the number of VLs when limited by the number of SDMA engines. The hardware has multiple egress mechanisms, SDMA and pio, and multiples of those. These mechanisms are chosen using the VL (8) The fix corrects a panic issue with one of the platforms that doesn't have enough SDMA (4) mechanisms for the typical number of VLs. Reviewed-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Dean Luick <dean.luick@intel.com> Signed-off-by: Jubin John <jubin.john@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/rdma/hfi1/chip.c')
-rw-r--r--drivers/staging/rdma/hfi1/chip.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/staging/rdma/hfi1/chip.c b/drivers/staging/rdma/hfi1/chip.c
index 03a665f0254e..0c27cc09c918 100644
--- a/drivers/staging/rdma/hfi1/chip.c
+++ b/drivers/staging/rdma/hfi1/chip.c
@@ -10645,9 +10645,9 @@ struct hfi1_devdata *hfi1_init_dd(struct pci_dev *pdev,
/* insure num_vls isn't larger than number of sdma engines */
if (HFI1_CAP_IS_KSET(SDMA) && num_vls > dd->chip_sdma_engines) {
dd_dev_err(dd, "num_vls %u too large, using %u VLs\n",
- num_vls, HFI1_MAX_VLS_SUPPORTED);
- ppd->vls_supported = num_vls = HFI1_MAX_VLS_SUPPORTED;
- ppd->vls_operational = ppd->vls_supported;
+ num_vls, dd->chip_sdma_engines);
+ num_vls = dd->chip_sdma_engines;
+ ppd->vls_supported = dd->chip_sdma_engines;
}
/*