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author | Gulsah Kose | 2014-03-15 00:43:06 +0100 |
---|---|---|
committer | Peter P Waskiewicz Jr | 2014-03-17 04:02:20 +0100 |
commit | f137058f82d4e9aa1b7086dfa70428d236fd9820 (patch) | |
tree | b622ff0f5b634a8de17e74b8ed6fdb5d8d21a3f3 /drivers/staging/silicom | |
parent | staging: gdm72xx: remove completed TODO item (diff) | |
download | kernel-qcow2-linux-f137058f82d4e9aa1b7086dfa70428d236fd9820.tar.gz kernel-qcow2-linux-f137058f82d4e9aa1b7086dfa70428d236fd9820.tar.xz kernel-qcow2-linux-f137058f82d4e9aa1b7086dfa70428d236fd9820.zip |
staging: silicom: Fix line over 80 characters.
Fix checkpatch.pl issues with line over 80 characters in bp_mod.h
Signed-off-by: Gulsah Kose <gulsah.1004@gmail.com>
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Diffstat (limited to 'drivers/staging/silicom')
-rw-r--r-- | drivers/staging/silicom/bp_mod.h | 23 |
1 files changed, 17 insertions, 6 deletions
diff --git a/drivers/staging/silicom/bp_mod.h b/drivers/staging/silicom/bp_mod.h index 9999e6eb03a4..82b4963e97b6 100644 --- a/drivers/staging/silicom/bp_mod.h +++ b/drivers/staging/silicom/bp_mod.h @@ -497,11 +497,19 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j) #define BPCTLI_STATUS 0x00008 /* Device Status - RO */ /* HW related */ -#define BPCTLI_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW Defineable Pin 6 */ -#define BPCTLI_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Defineable Pin 7 */ +#define BPCTLI_CTRL_EXT_SDP6_DATA 0x00000040 /* Value of SW + * Defineable Pin 6 + */ +#define BPCTLI_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW + * Defineable Pin 7 + */ #define BPCTLI_CTRL_SDP0_DATA 0x00040000 /* SWDPIN 0 value */ -#define BPCTLI_CTRL_EXT_SDP6_DIR 0x00000400 /* Direction of SDP6 0=in 1=out */ -#define BPCTLI_CTRL_EXT_SDP7_DIR 0x00000800 /* Direction of SDP7 0=in 1=out */ +#define BPCTLI_CTRL_EXT_SDP6_DIR 0x00000400 /* Direction of SDP6 + * 0=in 1=out + */ +#define BPCTLI_CTRL_EXT_SDP7_DIR 0x00000800 /* Direction of SDP7 + * 0=in 1=out + */ #define BPCTLI_CTRL_SDP0_DIR 0x00400000 /* SDP0 Input or output */ #define BPCTLI_CTRL_SWDPIN1 0x00080000 #define BPCTLI_CTRL_SDP1_DIR 0x00800000 @@ -565,7 +573,9 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j) #define BPCTLI_SWFW_PHY0_SM 0x02 #define BPCTLI_SWFW_PHY1_SM 0x04 -#define BPCTLI_SW_FW_SYNC 0x05B5C /* Software-Firmware Synchronization - RW */ +#define BPCTLI_SW_FW_SYNC 0x05B5C /* Software-Firmware + * Synchronization - RW + */ #define BPCTLI_SWSM 0x05B50 /* SW Semaphore */ #define BPCTLI_FWSM 0x05B54 /* FW Semaphore */ @@ -623,7 +633,8 @@ static inline unsigned int jiffies_to_msecs(const unsigned long j) /*#define BP10G_MCLK_DATA_OUT9 BP10G_I2C_CLK_OUT #define BP10G_MDIO_DATA_OUT9 BP10G_I2C_DATA_OUT*/ - /*#define BP10G_MCLK_DATA_OUT9*//*BP10G_I2C_DATA_OUT */ + /*#define BP10G_MCLK_DATA_OUT9*/ + /*BP10G_I2C_DATA_OUT */ #define BP10G_MDIO_DATA_OUT9 BP10G_I2C_DATA_OUT /*BP10G_I2C_CLK_OUT */ /* VIA EOSDP ! */ |