diff options
| author | Aaro Koskinen | 2013-03-27 22:53:15 +0100 |
|---|---|---|
| committer | Greg Kroah-Hartman | 2013-03-29 00:10:16 +0100 |
| commit | 597d96b63b81873c91b0cee93ca890d52b531102 (patch) | |
| tree | 5cf49f6ccbb09a7165a7e6073bf58a74d8bc9732 /drivers/staging/xgifb/vb_init.c | |
| parent | staging: xgifb: make SR15/SR13 arrays single dimensional (diff) | |
| download | kernel-qcow2-linux-597d96b63b81873c91b0cee93ca890d52b531102.tar.gz kernel-qcow2-linux-597d96b63b81873c91b0cee93ca890d52b531102.tar.xz kernel-qcow2-linux-597d96b63b81873c91b0cee93ca890d52b531102.zip | |
staging: xgifb: rename SR15/SR13 arrays to SR18
Since we are programming SR register 18, better name structs/arrays
accordingly to avoid confusion.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/staging/xgifb/vb_init.c')
| -rw-r--r-- | drivers/staging/xgifb/vb_init.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/staging/xgifb/vb_init.c b/drivers/staging/xgifb/vb_init.c index 6e2c6b40c31b..19ce5a978cae 100644 --- a/drivers/staging/xgifb/vb_init.c +++ b/drivers/staging/xgifb/vb_init.c @@ -90,14 +90,14 @@ static void XGINew_DDR1x_MRS_340(unsigned long P3c4, xgifb_reg_set(P3c4, 0x16, 0x80); udelay(60); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */ + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ xgifb_reg_set(P3c4, 0x19, 0x01); xgifb_reg_set(P3c4, 0x16, 0x03); xgifb_reg_set(P3c4, 0x16, 0x83); mdelay(1); xgifb_reg_set(P3c4, 0x1B, 0x03); udelay(500); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */ + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ xgifb_reg_set(P3c4, 0x19, 0x00); xgifb_reg_set(P3c4, 0x16, 0x03); xgifb_reg_set(P3c4, 0x16, 0x83); @@ -261,14 +261,14 @@ static void XGINew_DDR1x_MRS_XG20(unsigned long P3c4, xgifb_reg_set(P3c4, 0x16, 0x00); xgifb_reg_set(P3c4, 0x16, 0x80); udelay(60); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */ + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ xgifb_reg_set(P3c4, 0x19, 0x01); xgifb_reg_set(P3c4, 0x16, 0x03); xgifb_reg_set(P3c4, 0x16, 0x83); mdelay(1); xgifb_reg_set(P3c4, 0x1B, 0x03); udelay(500); - xgifb_reg_set(P3c4, 0x18, pVBInfo->SR15[pVBInfo->ram_type]); /* SR18 */ + xgifb_reg_set(P3c4, 0x18, pVBInfo->SR18[pVBInfo->ram_type]); /* SR18 */ xgifb_reg_set(P3c4, 0x19, 0x00); xgifb_reg_set(P3c4, 0x16, 0x03); xgifb_reg_set(P3c4, 0x16, 0x83); |