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authorPaul Zimmerman2014-09-16 22:47:26 +0200
committerGreg Kroah-Hartman2014-09-20 01:17:58 +0200
commite8f8c14d9da7ab1b8a7b0f769cd7148ca2cc7d10 (patch)
tree1f689fc9680a8059f83fd2be66c9541a700c4da5 /drivers/usb/dwc2
parentusb: dwc2/gadget: disable clock when it's not needed (diff)
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usb: dwc2: clip max_transfer_size to 65535
Clip max_transfer_size to 65535 for host. dwc2_hc_setup_align_buf() allocates coherent buffers with this size, and if it's too large we can exhaust the coherent DMA pool. Tested on Raspberry Pi and Altera SOCFPGA. Signed-off-by: Paul Zimmerman <paulz@synopsys.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/dwc2')
-rw-r--r--drivers/usb/dwc2/core.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index ea0048a724cf..d9269459d481 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -2743,6 +2743,13 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >>
GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT;
hw->max_transfer_size = (1 << (width + 11)) - 1;
+ /*
+ * Clip max_transfer_size to 65535. dwc2_hc_setup_align_buf() allocates
+ * coherent buffers with this size, and if it's too large we can
+ * exhaust the coherent DMA pool.
+ */
+ if (hw->max_transfer_size > 65535)
+ hw->max_transfer_size = 65535;
width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >>
GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT;
hw->max_packet_count = (1 << (width + 4)) - 1;