diff options
| author | Peter Chen | 2014-02-24 03:20:55 +0100 |
|---|---|---|
| committer | Felipe Balbi | 2014-03-05 21:40:07 +0100 |
| commit | 1364414411acf0fe691ae7e045a64ee366692ba0 (patch) | |
| tree | 460025e23a551838ba822eedcf4f3a6f3641f8e5 /drivers/usb/phy/phy-mxs-usb.c | |
| parent | usb: phy: mxs: Add platform judgement code (diff) | |
| download | kernel-qcow2-linux-1364414411acf0fe691ae7e045a64ee366692ba0.tar.gz kernel-qcow2-linux-1364414411acf0fe691ae7e045a64ee366692ba0.tar.xz kernel-qcow2-linux-1364414411acf0fe691ae7e045a64ee366692ba0.zip | |
usb: phy: mxs: Add auto clock and power setting
The auto setting is used to open related power and clocks
automatically after receiving wakeup signal.
With this feature, the PHY's clock and power can be recovered
correctly from low power mode, it is guaranteed by IC logic.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Diffstat (limited to 'drivers/usb/phy/phy-mxs-usb.c')
| -rw-r--r-- | drivers/usb/phy/phy-mxs-usb.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c index cf58d8ec9901..d7adca3738ff 100644 --- a/drivers/usb/phy/phy-mxs-usb.c +++ b/drivers/usb/phy/phy-mxs-usb.c @@ -31,6 +31,11 @@ #define BM_USBPHY_CTRL_SFTRST BIT(31) #define BM_USBPHY_CTRL_CLKGATE BIT(30) +#define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS BIT(26) +#define BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE BIT(25) +#define BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD BIT(20) +#define BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE BIT(19) +#define BM_USBPHY_CTRL_ENAUTO_PWRON_PLL BIT(18) #define BM_USBPHY_CTRL_ENUTMILEVEL3 BIT(15) #define BM_USBPHY_CTRL_ENUTMILEVEL2 BIT(14) #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT BIT(1) @@ -96,9 +101,18 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy) /* Power up the PHY */ writel(0, base + HW_USBPHY_PWD); - /* enable FS/LS device */ - writel(BM_USBPHY_CTRL_ENUTMILEVEL2 | - BM_USBPHY_CTRL_ENUTMILEVEL3, + /* + * USB PHY Ctrl Setting + * - Auto clock/power on + * - Enable full/low speed support + */ + writel(BM_USBPHY_CTRL_ENAUTOSET_USBCLKS | + BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE | + BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD | + BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE | + BM_USBPHY_CTRL_ENAUTO_PWRON_PLL | + BM_USBPHY_CTRL_ENUTMILEVEL2 | + BM_USBPHY_CTRL_ENUTMILEVEL3, base + HW_USBPHY_CTRL_SET); return 0; |