diff options
| author | Bjorn Helgaas | 2014-01-30 00:13:51 +0100 |
|---|---|---|
| committer | Bjorn Helgaas | 2014-02-18 23:54:04 +0100 |
| commit | 1e2571a78138361f74afeb4c5df859b9536b2d8e (patch) | |
| tree | e1e83c3e55ba1e23cc23f58b7afacb05f7b79c89 /drivers | |
| parent | ia64/PCI: Set IORESOURCE_ROM_SHADOW only for the default VGA device (diff) | |
| download | kernel-qcow2-linux-1e2571a78138361f74afeb4c5df859b9536b2d8e.tar.gz kernel-qcow2-linux-1e2571a78138361f74afeb4c5df859b9536b2d8e.tar.xz kernel-qcow2-linux-1e2571a78138361f74afeb4c5df859b9536b2d8e.zip | |
PCI: Enable INTx if BIOS left them disabled
Some firmware leaves the Interrupt Disable bit set even if the device uses
INTx interrupts. Clear Interrupt Disable so we get those interrupts.
Based on the report mentioned below, if the user selects the "EHCI only"
option in the Intel Baytrail BIOS, the EHCI device is handed off to the OS
with the PCI_COMMAND_INTX_DISABLE bit set.
Link: http://lkml.kernel.org/r/20140114181721.GC12126@xanatos
Link: https://bugzilla.kernel.org/show_bug.cgi?id=70601
Reported-by: Chris Cheng <chris.cheng@atrustcorp.com>
Reported-and-tested-by: Jamie Chen <jamie.chen@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org
CC: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pci/pci.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 52e10e1181d0..8dc3e701ec57 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -1181,6 +1181,8 @@ EXPORT_SYMBOL_GPL(pci_load_and_free_saved_state); static int do_pci_enable_device(struct pci_dev *dev, int bars) { int err; + u16 cmd; + u8 pin; err = pci_set_power_state(dev, PCI_D0); if (err < 0 && err != -EIO) @@ -1190,6 +1192,14 @@ static int do_pci_enable_device(struct pci_dev *dev, int bars) return err; pci_fixup_device(pci_fixup_enable, dev); + pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin); + if (pin) { + pci_read_config_word(dev, PCI_COMMAND, &cmd); + if (cmd & PCI_COMMAND_INTX_DISABLE) + pci_write_config_word(dev, PCI_COMMAND, + cmd & ~PCI_COMMAND_INTX_DISABLE); + } + return 0; } |