diff options
| author | Linus Torvalds | 2011-01-07 01:50:35 +0100 |
|---|---|---|
| committer | Linus Torvalds | 2011-01-07 01:50:35 +0100 |
| commit | 3c0cb7c31c206aaedb967e44b98442bbeb17a6c4 (patch) | |
| tree | 3ecba45d7ffae4fba4a5aafaef4af5b0b1105bde /drivers | |
| parent | Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc-next-2.6 (diff) | |
| parent | Merge branch 'devel-stable' into devel (diff) | |
| download | kernel-qcow2-linux-3c0cb7c31c206aaedb967e44b98442bbeb17a6c4.tar.gz kernel-qcow2-linux-3c0cb7c31c206aaedb967e44b98442bbeb17a6c4.tar.xz kernel-qcow2-linux-3c0cb7c31c206aaedb967e44b98442bbeb17a6c4.zip | |
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (416 commits)
ARM: DMA: add support for DMA debugging
ARM: PL011: add DMA burst threshold support for ST variants
ARM: PL011: Add support for transmit DMA
ARM: PL011: Ensure IRQs are disabled in UART interrupt handler
ARM: PL011: Separate hardware FIFO size from TTY FIFO size
ARM: PL011: Allow better handling of vendor data
ARM: PL011: Ensure error flags are clear at startup
ARM: PL011: include revision number in boot-time port printk
ARM: vexpress: add sched_clock() for Versatile Express
ARM i.MX53: Make MX53 EVK bootable
ARM i.MX53: Some bug fix about MX53 MSL code
ARM: 6607/1: sa1100: Update platform device registration
ARM: 6606/1: sa1100: Fix platform device registration
ARM i.MX51: rename IPU irqs
ARM i.MX51: Add ipu clock support
ARM: imx/mx27_3ds: Add PMIC support
ARM: DMA: Replace page_to_dma()/dma_to_page() with pfn_to_dma()/dma_to_pfn()
mx51: fix usb clock support
MX51: Add support for usb host 2
arch/arm/plat-mxc/ehci.c: fix errors/typos
...
Diffstat (limited to 'drivers')
46 files changed, 4285 insertions, 1031 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig index a2b902f4d437..3d93b3a3d630 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -111,4 +111,6 @@ source "drivers/xen/Kconfig" source "drivers/staging/Kconfig" source "drivers/platform/Kconfig" + +source "drivers/clk/Kconfig" endmenu diff --git a/drivers/Makefile b/drivers/Makefile index f3ebb30f1b7f..bf15ce7493d2 100644 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -115,3 +115,5 @@ obj-$(CONFIG_VLYNQ) += vlynq/ obj-$(CONFIG_STAGING) += staging/ obj-y += platform/ obj-y += ieee802154/ +#common clk code +obj-y += clk/ diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c index 2737b9752205..e7df019d29d4 100644 --- a/drivers/amba/bus.c +++ b/drivers/amba/bus.c @@ -147,6 +147,39 @@ static void amba_put_disable_pclk(struct amba_device *pcdev) clk_put(pclk); } +static int amba_get_enable_vcore(struct amba_device *pcdev) +{ + struct regulator *vcore = regulator_get(&pcdev->dev, "vcore"); + int ret; + + pcdev->vcore = vcore; + + if (IS_ERR(vcore)) { + /* It is OK not to supply a vcore regulator */ + if (PTR_ERR(vcore) == -ENODEV) + return 0; + return PTR_ERR(vcore); + } + + ret = regulator_enable(vcore); + if (ret) { + regulator_put(vcore); + pcdev->vcore = ERR_PTR(-ENODEV); + } + + return ret; +} + +static void amba_put_disable_vcore(struct amba_device *pcdev) +{ + struct regulator *vcore = pcdev->vcore; + + if (!IS_ERR(vcore)) { + regulator_disable(vcore); + regulator_put(vcore); + } +} + /* * These are the device model conversion veneers; they convert the * device model structures to our more specific structures. @@ -159,6 +192,10 @@ static int amba_probe(struct device *dev) int ret; do { + ret = amba_get_enable_vcore(pcdev); + if (ret) + break; + ret = amba_get_enable_pclk(pcdev); if (ret) break; @@ -168,6 +205,7 @@ static int amba_probe(struct device *dev) break; amba_put_disable_pclk(pcdev); + amba_put_disable_vcore(pcdev); } while (0); return ret; @@ -180,6 +218,7 @@ static int amba_remove(struct device *dev) int ret = drv->remove(pcdev); amba_put_disable_pclk(pcdev); + amba_put_disable_vcore(pcdev); return ret; } diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig new file mode 100644 index 000000000000..4168c8896e16 --- /dev/null +++ b/drivers/clk/Kconfig @@ -0,0 +1,4 @@ + +config CLKDEV_LOOKUP + bool + select HAVE_CLK diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile new file mode 100644 index 000000000000..07613fa172c9 --- /dev/null +++ b/drivers/clk/Makefile @@ -0,0 +1,2 @@ + +obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c new file mode 100644 index 000000000000..0fc0a79852de --- /dev/null +++ b/drivers/clk/clkdev.c @@ -0,0 +1,176 @@ +/* + * drivers/clk/clkdev.c + * + * Copyright (C) 2008 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * Helper for the clk API to assist looking up a struct clk. + */ +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/device.h> +#include <linux/list.h> +#include <linux/errno.h> +#include <linux/err.h> +#include <linux/string.h> +#include <linux/mutex.h> +#include <linux/clk.h> +#include <linux/clkdev.h> + +static LIST_HEAD(clocks); +static DEFINE_MUTEX(clocks_mutex); + +/* + * Find the correct struct clk for the device and connection ID. + * We do slightly fuzzy matching here: + * An entry with a NULL ID is assumed to be a wildcard. + * If an entry has a device ID, it must match + * If an entry has a connection ID, it must match + * Then we take the most specific entry - with the following + * order of precedence: dev+con > dev only > con only. + */ +static struct clk *clk_find(const char *dev_id, const char *con_id) +{ + struct clk_lookup *p; + struct clk *clk = NULL; + int match, best = 0; + + list_for_each_entry(p, &clocks, node) { + match = 0; + if (p->dev_id) { + if (!dev_id || strcmp(p->dev_id, dev_id)) + continue; + match += 2; + } + if (p->con_id) { + if (!con_id || strcmp(p->con_id, con_id)) + continue; + match += 1; + } + + if (match > best) { + clk = p->clk; + if (match != 3) + best = match; + else + break; + } + } + return clk; +} + +struct clk *clk_get_sys(const char *dev_id, const char *con_id) +{ + struct clk *clk; + + mutex_lock(&clocks_mutex); + clk = clk_find(dev_id, con_id); + if (clk && !__clk_get(clk)) + clk = NULL; + mutex_unlock(&clocks_mutex); + + return clk ? clk : ERR_PTR(-ENOENT); +} +EXPORT_SYMBOL(clk_get_sys); + +struct clk *clk_get(struct device *dev, const char *con_id) +{ + const char *dev_id = dev ? dev_name(dev) : NULL; + + return clk_get_sys(dev_id, con_id); +} +EXPORT_SYMBOL(clk_get); + +void clk_put(struct clk *clk) +{ + __clk_put(clk); +} +EXPORT_SYMBOL(clk_put); + +void clkdev_add(struct clk_lookup *cl) +{ + mutex_lock(&clocks_mutex); + list_add_tail(&cl->node, &clocks); + mutex_unlock(&clocks_mutex); +} +EXPORT_SYMBOL(clkdev_add); + +void __init clkdev_add_table(struct clk_lookup *cl, size_t num) +{ + mutex_lock(&clocks_mutex); + while (num--) { + list_add_tail(&cl->node, &clocks); + cl++; + } + mutex_unlock(&clocks_mutex); +} + +#define MAX_DEV_ID 20 +#define MAX_CON_ID 16 + +struct clk_lookup_alloc { + struct clk_lookup cl; + char dev_id[MAX_DEV_ID]; + char con_id[MAX_CON_ID]; +}; + +struct clk_lookup * __init_refok +clkdev_alloc(struct clk *clk, const char *con_id, const char *dev_fmt, ...) +{ + struct clk_lookup_alloc *cla; + + cla = __clkdev_alloc(sizeof(*cla)); + if (!cla) + return NULL; + + cla->cl.clk = clk; + if (con_id) { + strlcpy(cla->con_id, con_id, sizeof(cla->con_id)); + cla->cl.con_id = cla->con_id; + } + + if (dev_fmt) { + va_list ap; + + va_start(ap, dev_fmt); + vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap); + cla->cl.dev_id = cla->dev_id; + va_end(ap); + } + + return &cla->cl; +} +EXPORT_SYMBOL(clkdev_alloc); + +int clk_add_alias(const char *alias, const char *alias_dev_name, char *id, + struct device *dev) +{ + struct clk *r = clk_get(dev, id); + struct clk_lookup *l; + + if (IS_ERR(r)) + return PTR_ERR(r); + + l = clkdev_alloc(r, alias, alias_dev_name); + clk_put(r); + if (!l) + return -ENODEV; + clkdev_add(l); + return 0; +} +EXPORT_SYMBOL(clk_add_alias); + +/* + * clkdev_drop - remove a clock dynamically allocated + */ +void clkdev_drop(struct clk_lookup *cl) +{ + mutex_lock(&clocks_mutex); + list_del(&cl->node); + mutex_unlock(&clocks_mutex); + kfree(cl); +} +EXPORT_SYMBOL(clkdev_drop); diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index d0602dd5d1b2..d5a5d4d9c19b 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c @@ -273,50 +273,6 @@ struct sdma_channel { #define MXC_SDMA_MIN_PRIORITY 1 #define MXC_SDMA_MAX_PRIORITY 7 -/** - * struct sdma_script_start_addrs - SDMA script start pointers - * - * start addresses of the different functions in the physical - * address space of the SDMA engine. - */ -struct sdma_script_start_addrs { - u32 ap_2_ap_addr; - u32 ap_2_bp_addr; - u32 ap_2_ap_fixed_addr; - u32 bp_2_ap_addr; - u32 loopback_on_dsp_side_addr; - u32 mcu_interrupt_only_addr; - u32 firi_2_per_addr; - u32 firi_2_mcu_addr; - u32 per_2_firi_addr; - u32 mcu_2_firi_addr; - u32 uart_2_per_addr; - u32 uart_2_mcu_addr; - u32 per_2_app_addr; - u32 mcu_2_app_addr; - u32 per_2_per_addr; - u32 uartsh_2_per_addr; - u32 uartsh_2_mcu_addr; - u32 per_2_shp_addr; - u32 mcu_2_shp_addr; - u32 ata_2_mcu_addr; - u32 mcu_2_ata_addr; - u32 app_2_per_addr; - u32 app_2_mcu_addr; - u32 shp_2_per_addr; - u32 shp_2_mcu_addr; - u32 mshc_2_mcu_addr; - u32 mcu_2_mshc_addr; - u32 spdif_2_mcu_addr; - u32 mcu_2_spdif_addr; - u32 asrc_2_mcu_addr; - u32 ext_mem_2_ipu_addr; - u32 descrambler_addr; - u32 dptc_dvfs_addr; - u32 utra_addr; - u32 ram_code_start_addr; -}; - #define SDMA_FIRMWARE_MAGIC 0x414d4453 /** @@ -1127,8 +1083,74 @@ static void sdma_issue_pending(struct dma_chan *chan) */ } -static int __init sdma_init(struct sdma_engine *sdma, - void *ram_code, int ram_code_size) +#define SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1 34 + +static void sdma_add_scripts(struct sdma_engine *sdma, + const struct sdma_script_start_addrs *addr) +{ + s32 *addr_arr = (u32 *)addr; + s32 *saddr_arr = (u32 *)sdma->script_addrs; + int i; + + for (i = 0; i < SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; i++) + if (addr_arr[i] > 0) + saddr_arr[i] = addr_arr[i]; +} + +static int __init sdma_get_firmware(struct sdma_engine *sdma, + const char *cpu_name, int to_version) +{ + const struct firmware *fw; + char *fwname; + const struct sdma_firmware_header *header; + int ret; + const struct sdma_script_start_addrs *addr; + unsigned short *ram_code; + + fwname = kasprintf(GFP_KERNEL, "sdma-%s-to%d.bin", cpu_name, to_version); + if (!fwname) + return -ENOMEM; + + ret = request_firmware(&fw, fwname, sdma->dev); + if (ret) { + kfree(fwname); + return ret; + } + kfree(fwname); + + if (fw->size < sizeof(*header)) + goto err_firmware; + + header = (struct sdma_firmware_header *)fw->data; + + if (header->magic != SDMA_FIRMWARE_MAGIC) + goto err_firmware; + if (header->ram_code_start + header->ram_code_size > fw->size) + goto err_firmware; + + addr = (void *)header + header->script_addrs_start; + ram_code = (void *)header + header->ram_code_start; + + clk_enable(sdma->clk); + /* download the RAM image for SDMA */ + sdma_load_script(sdma, ram_code, + header->ram_code_size, + sdma->script_addrs->ram_code_start_addr); + clk_disable(sdma->clk); + + sdma_add_scripts(sdma, addr); + + dev_info(sdma->dev, "loaded firmware %d.%d\n", + header->version_major, + header->version_minor); + +err_firmware: + release_firmware(fw); + + return ret; +} + +static int __init sdma_init(struct sdma_engine *sdma) { int i, ret; dma_addr_t ccb_phys; @@ -1192,11 +1214,6 @@ static int __init sdma_init(struct sdma_engine *sdma, __raw_writel(ccb_phys, sdma->regs + SDMA_H_C0PTR); - /* download the RAM image for SDMA */ - sdma_load_script(sdma, ram_code, - ram_code_size, - sdma->script_addrs->ram_code_start_addr); - /* Set bits of CONFIG register with given context switching mode */ __raw_writel(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG); @@ -1216,14 +1233,9 @@ err_dma_alloc: static int __init sdma_probe(struct platform_device *pdev) { int ret; - const struct firmware *fw; - const struct sdma_firmware_header *header; - const struct sdma_script_start_addrs *addr; int irq; - unsigned short *ram_code; struct resource *iores; struct sdma_platform_data *pdata = pdev->dev.platform_data; - char *fwname; int i; dma_cap_mask_t mask; struct sdma_engine *sdma; @@ -1262,38 +1274,9 @@ static int __init sdma_probe(struct platform_device *pdev) if (ret) goto err_request_irq; - fwname = kasprintf(GFP_KERNEL, "sdma-%s-to%d.bin", - pdata->cpu_name, pdata->to_version); - if (!fwname) { - ret = -ENOMEM; - goto err_cputype; - } - - ret = request_firmware(&fw, fwname, &pdev->dev); - if (ret) { - dev_err(&pdev->dev, "request firmware \"%s\" failed with %d\n", - fwname, ret); - kfree(fwname); - goto err_cputype; - } - kfree(fwname); - - if (fw->size < sizeof(*header)) - goto err_firmware; - - header = (struct sdma_firmware_header *)fw->data; - - if (header->magic != SDMA_FIRMWARE_MAGIC) - goto err_firmware; - if (header->ram_code_start + header->ram_code_size > fw->size) - goto err_firmware; - - addr = (void *)header + header->script_addrs_start; - ram_code = (void *)header + header->ram_code_start; - sdma->script_addrs = kmalloc(sizeof(*addr), GFP_KERNEL); + sdma->script_addrs = kzalloc(sizeof(*sdma->script_addrs), GFP_KERNEL); if (!sdma->script_addrs) - goto err_firmware; - memcpy(sdma->script_addrs, addr, sizeof(*addr)); + goto err_alloc; sdma->version = pdata->sdma_version; @@ -1316,10 +1299,15 @@ static int __init sdma_probe(struct platform_device *pdev) list_add_tail(&sdmac->chan.device_node, &sdma->dma_device.channels); } - ret = sdma_init(sdma, ram_code, header->ram_code_size); + ret = sdma_init(sdma); if (ret) goto err_init; + if (pdata->script_addrs) + sdma_add_scripts(sdma, pdata->script_addrs); + + sdma_get_firmware(sdma, pdata->cpu_name, pdata->to_version); + sdma->dma_device.dev = &pdev->dev; sdma->dma_device.device_alloc_chan_resources = sdma_alloc_chan_resources; @@ -1336,10 +1324,6 @@ static int __init sdma_probe(struct platform_device *pdev) goto err_init; } - dev_info(&pdev->dev, "initialized (firmware %d.%d)\n", - header->version_major, - header->version_minor); - /* request channel 0. This is an internal control channel * to the SDMA engine and not available to clients. */ @@ -1347,15 +1331,13 @@ static int __init sdma_probe(struct platform_device *pdev) dma_cap_set(DMA_SLAVE, mask); dma_request_channel(mask, NULL, NULL); - release_firmware(fw); + dev_info(sdma->dev, "initialized\n"); return 0; err_init: kfree(sdma->script_addrs); -err_firmware: - release_firmware(fw); -err_cputype: +err_alloc: free_irq(irq, sdma); err_request_irq: iounmap(sdma->regs); diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 3143ac795eb0..082495bb08a7 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -230,11 +230,11 @@ config GPIO_STMPE This enables support for the GPIOs found on the STMPE I/O Expanders. -config GPIO_TC35892 - bool "TC35892 GPIOs" - depends on MFD_TC35892 +config GPIO_TC3589X + bool "TC3589X GPIOs" + depends on MFD_TC3589X help - This enables support for the GPIOs found on the TC35892 + This enables support for the GPIOs found on the TC3589X I/O Expander. config GPIO_TWL4030 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index bdf3ddec0652..39bfd7a37650 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -24,7 +24,7 @@ obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o obj-$(CONFIG_GPIO_PCH) += pch_gpio.o obj-$(CONFIG_GPIO_PL061) += pl061.o obj-$(CONFIG_GPIO_STMPE) += stmpe-gpio.o -obj-$(CONFIG_GPIO_TC35892) += tc35892-gpio.o +obj-$(CONFIG_GPIO_TC3589X) += tc3589x-gpio.o obj-$(CONFIG_GPIO_TIMBERDALE) += timbgpio.o obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o obj-$(CONFIG_GPIO_UCB1400) += ucb1400_gpio.o diff --git a/drivers/gpio/tc35892-gpio.c b/drivers/gpio/tc35892-gpio.c deleted file mode 100644 index 7e10c935a047..000000000000 --- a/drivers/gpio/tc35892-gpio.c +++ /dev/null @@ -1,389 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License, version 2 - * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson - * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson - */ - -#include <linux/module.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/slab.h> -#include <linux/gpio.h> -#include <linux/irq.h> -#include <linux/interrupt.h> -#include <linux/mfd/tc35892.h> - -/* - * These registers are modified under the irq bus lock and cached to avoid - * unnecessary writes in bus_sync_unlock. - */ -enum { REG_IBE, REG_IEV, REG_IS, REG_IE }; - -#define CACHE_NR_REGS 4 -#define CACHE_NR_BANKS 3 - -struct tc35892_gpio { - struct gpio_chip chip; - struct tc35892 *tc35892; - struct device *dev; - struct mutex irq_lock; - - int irq_base; - - /* Caches of interrupt control registers for bus_lock */ - u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; - u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; -}; - -static inline struct tc35892_gpio *to_tc35892_gpio(struct gpio_chip *chip) -{ - return container_of(chip, struct tc35892_gpio, chip); -} - -static int tc35892_gpio_get(struct gpio_chip *chip, unsigned offset) -{ - struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - u8 reg = TC35892_GPIODATA0 + (offset / 8) * 2; - u8 mask = 1 << (offset % 8); - int ret; - - ret = tc35892_reg_read(tc35892, reg); - if (ret < 0) - return ret; - - return ret & mask; -} - -static void tc35892_gpio_set(struct gpio_chip *chip, unsigned offset, int val) -{ - struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - u8 reg = TC35892_GPIODATA0 + (offset / 8) * 2; - unsigned pos = offset % 8; - u8 data[] = {!!val << pos, 1 << pos}; - - tc35892_block_write(tc35892, reg, ARRAY_SIZE(data), data); -} - -static int tc35892_gpio_direction_output(struct gpio_chip *chip, - unsigned offset, int val) -{ - struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - u8 reg = TC35892_GPIODIR0 + offset / 8; - unsigned pos = offset % 8; - - tc35892_gpio_set(chip, offset, val); - - return tc35892_set_bits(tc35892, reg, 1 << pos, 1 << pos); -} - -static int tc35892_gpio_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - u8 reg = TC35892_GPIODIR0 + offset / 8; - unsigned pos = offset % 8; - - return tc35892_set_bits(tc35892, reg, 1 << pos, 0); -} - -static int tc35892_gpio_to_irq(struct gpio_chip *chip, unsigned offset) -{ - struct tc35892_gpio *tc35892_gpio = to_tc35892_gpio(chip); - - return tc35892_gpio->irq_base + offset; -} - -static struct gpio_chip template_chip = { - .label = "tc35892", - .owner = THIS_MODULE, - .direction_input = tc35892_gpio_direction_input, - .get = tc35892_gpio_get, - .direction_output = tc35892_gpio_direction_output, - .set = tc35892_gpio_set, - .to_irq = tc35892_gpio_to_irq, - .can_sleep = 1, -}; - -static int tc35892_gpio_irq_set_type(unsigned int irq, unsigned int type) -{ - struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); - int offset = irq - tc35892_gpio->irq_base; - int regoffset = offset / 8; - int mask = 1 << (offset % 8); - - if (type == IRQ_TYPE_EDGE_BOTH) { - tc35892_gpio->regs[REG_IBE][regoffset] |= mask; - return 0; - } - - tc35892_gpio->regs[REG_IBE][regoffset] &= ~mask; - - if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH) - tc35892_gpio->regs[REG_IS][regoffset] |= mask; - else - tc35892_gpio->regs[REG_IS][regoffset] &= ~mask; - - if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) - tc35892_gpio->regs[REG_IEV][regoffset] |= mask; - else - tc35892_gpio->regs[REG_IEV][regoffset] &= ~mask; - - return 0; -} - -static void tc35892_gpio_irq_lock(unsigned int irq) -{ - struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); - - mutex_lock(&tc35892_gpio->irq_lock); -} - -static void tc35892_gpio_irq_sync_unlock(unsigned int irq) -{ - struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - static const u8 regmap[] = { - [REG_IBE] = TC35892_GPIOIBE0, - [REG_IEV] = TC35892_GPIOIEV0, - [REG_IS] = TC35892_GPIOIS0, - [REG_IE] = TC35892_GPIOIE0, - }; - int i, j; - - for (i = 0; i < CACHE_NR_REGS; i++) { - for (j = 0; j < CACHE_NR_BANKS; j++) { - u8 old = tc35892_gpio->oldregs[i][j]; - u8 new = tc35892_gpio->regs[i][j]; - - if (new == old) - continue; - - tc35892_gpio->oldregs[i][j] = new; - tc35892_reg_write(tc35892, regmap[i] + j * 8, new); - } - } - - mutex_unlock(&tc35892_gpio->irq_lock); -} - -static void tc35892_gpio_irq_mask(unsigned int irq) -{ - struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); - int offset = irq - tc35892_gpio->irq_base; - int regoffset = offset / 8; - int mask = 1 << (offset % 8); - - tc35892_gpio->regs[REG_IE][regoffset] &= ~mask; -} - -static void tc35892_gpio_irq_unmask(unsigned int irq) -{ - struct tc35892_gpio *tc35892_gpio = get_irq_chip_data(irq); - int offset = irq - tc35892_gpio->irq_base; - int regoffset = offset / 8; - int mask = 1 << (offset % 8); - - tc35892_gpio->regs[REG_IE][regoffset] |= mask; -} - -static struct irq_chip tc35892_gpio_irq_chip = { - .name = "tc35892-gpio", - .bus_lock = tc35892_gpio_irq_lock, - .bus_sync_unlock = tc35892_gpio_irq_sync_unlock, - .mask = tc35892_gpio_irq_mask, - .unmask = tc35892_gpio_irq_unmask, - .set_type = tc35892_gpio_irq_set_type, -}; - -static irqreturn_t tc35892_gpio_irq(int irq, void *dev) -{ - struct tc35892_gpio *tc35892_gpio = dev; - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - u8 status[CACHE_NR_BANKS]; - int ret; - int i; - - ret = tc35892_block_read(tc35892, TC35892_GPIOMIS0, - ARRAY_SIZE(status), status); - if (ret < 0) - return IRQ_NONE; - - for (i = 0; i < ARRAY_SIZE(status); i++) { - unsigned int stat = status[i]; - if (!stat) - continue; - - while (stat) { - int bit = __ffs(stat); - int line = i * 8 + bit; - - handle_nested_irq(tc35892_gpio->irq_base + line); - stat &= ~(1 << bit); - } - - tc35892_reg_write(tc35892, TC35892_GPIOIC0 + i, status[i]); - } - - return IRQ_HANDLED; -} - -static int tc35892_gpio_irq_init(struct tc35892_gpio *tc35892_gpio) -{ - int base = tc35892_gpio->irq_base; - int irq; - - for (irq = base; irq < base + tc35892_gpio->chip.ngpio; irq++) { - set_irq_chip_data(irq, tc35892_gpio); - set_irq_chip_and_handler(irq, &tc35892_gpio_irq_chip, - handle_simple_irq); - set_irq_nested_thread(irq, 1); -#ifdef CONFIG_ARM - set_irq_flags(irq, IRQF_VALID); -#else - set_irq_noprobe(irq); -#endif - } - - return 0; -} - -static void tc35892_gpio_irq_remove(struct tc35892_gpio *tc35892_gpio) -{ - int base = tc35892_gpio->irq_base; - int irq; - - for (irq = base; irq < base + tc35892_gpio->chip.ngpio; irq++) { -#ifdef CONFIG_ARM - set_irq_flags(irq, 0); -#endif - set_irq_chip_and_handler(irq, NULL, NULL); - set_irq_chip_data(irq, NULL); - } -} - -static int __devinit tc35892_gpio_probe(struct platform_device *pdev) -{ - struct tc35892 *tc35892 = dev_get_drvdata(pdev->dev.parent); - struct tc35892_gpio_platform_data *pdata; - struct tc35892_gpio *tc35892_gpio; - int ret; - int irq; - - pdata = tc35892->pdata->gpio; - if (!pdata) - return -ENODEV; - - irq = platform_get_irq(pdev, 0); - if (irq < 0) - return irq; - - tc35892_gpio = kzalloc(sizeof(struct tc35892_gpio), GFP_KERNEL); - if (!tc35892_gpio) - return -ENOMEM; - - mutex_init(&tc35892_gpio->irq_lock); - - tc35892_gpio->dev = &pdev->dev; - tc35892_gpio->tc35892 = tc35892; - - tc35892_gpio->chip = template_chip; - tc35892_gpio->chip.ngpio = tc35892->num_gpio; - tc35892_gpio->chip.dev = &pdev->dev; - tc35892_gpio->chip.base = pdata->gpio_base; - - tc35892_gpio->irq_base = tc35892->irq_base + TC35892_INT_GPIO(0); - - /* Bring the GPIO module out of reset */ - ret = tc35892_set_bits(tc35892, TC35892_RSTCTRL, - TC35892_RSTCTRL_GPIRST, 0); - if (ret < 0) - goto out_free; - - ret = tc35892_gpio_irq_init(tc35892_gpio); - if (ret) - goto out_free; - - ret = request_threaded_irq(irq, NULL, tc35892_gpio_irq, IRQF_ONESHOT, - "tc35892-gpio", tc35892_gpio); - if (ret) { - dev_err(&pdev->dev, "unable to get irq: %d\n", ret); - goto out_removeirq; - } - - ret = gpiochip_add(&tc35892_gpio->chip); - if (ret) { - dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); - goto out_freeirq; - } - - if (pdata->setup) - pdata->setup(tc35892, tc35892_gpio->chip.base); - - platform_set_drvdata(pdev, tc35892_gpio); - - return 0; - -out_freeirq: - free_irq(irq, tc35892_gpio); -out_removeirq: - tc35892_gpio_irq_remove(tc35892_gpio); -out_free: - kfree(tc35892_gpio); - return ret; -} - -static int __devexit tc35892_gpio_remove(struct platform_device *pdev) -{ - struct tc35892_gpio *tc35892_gpio = platform_get_drvdata(pdev); - struct tc35892 *tc35892 = tc35892_gpio->tc35892; - struct tc35892_gpio_platform_data *pdata = tc35892->pdata->gpio; - int irq = platform_get_irq(pdev, 0); - int ret; - - if (pdata->remove) - pdata->remove(tc35892, tc35892_gpio->chip.base); - - ret = gpiochip_remove(&tc35892_gpio->chip); - if (ret < 0) { - dev_err(tc35892_gpio->dev, - "unable to remove gpiochip: %d\n", ret); - return ret; - } - - free_irq(irq, tc35892_gpio); - tc35892_gpio_irq_remove(tc35892_gpio); - - platform_set_drvdata(pdev, NULL); - kfree(tc35892_gpio); - - return 0; -} - -static struct platform_driver tc35892_gpio_driver = { - .driver.name = "tc35892-gpio", - .driver.owner = THIS_MODULE, - .probe = tc35892_gpio_probe, - .remove = __devexit_p(tc35892_gpio_remove), -}; - -static int __init tc35892_gpio_init(void) -{ - return platform_driver_register(&tc35892_gpio_driver); -} -subsys_initcall(tc35892_gpio_init); - -static void __exit tc35892_gpio_exit(void) -{ - platform_driver_unregister(&tc35892_gpio_driver); -} -module_exit(tc35892_gpio_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("TC35892 GPIO driver"); -MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent"); diff --git a/drivers/gpio/tc3589x-gpio.c b/drivers/gpio/tc3589x-gpio.c new file mode 100644 index 000000000000..180d584454fb --- /dev/null +++ b/drivers/gpio/tc3589x-gpio.c @@ -0,0 +1,389 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * License Terms: GNU General Public License, version 2 + * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson + * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/platform_device.h> +#include <linux/slab.h> +#include <linux/gpio.h> +#include <linux/irq.h> +#include <linux/interrupt.h> +#include <linux/mfd/tc3589x.h> + +/* + * These registers are modified under the irq bus lock and cached to avoid + * unnecessary writes in bus_sync_unlock. + */ +enum { REG_IBE, REG_IEV, REG_IS, REG_IE }; + +#define CACHE_NR_REGS 4 +#define CACHE_NR_BANKS 3 + +struct tc3589x_gpio { + struct gpio_chip chip; + struct tc3589x *tc3589x; + struct device *dev; + struct mutex irq_lock; + + int irq_base; + + /* Caches of interrupt control registers for bus_lock */ + u8 regs[CACHE_NR_REGS][CACHE_NR_BANKS]; + u8 oldregs[CACHE_NR_REGS][CACHE_NR_BANKS]; +}; + +static inline struct tc3589x_gpio *to_tc3589x_gpio(struct gpio_chip *chip) +{ + return container_of(chip, struct tc3589x_gpio, chip); +} + +static int tc3589x_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; + u8 mask = 1 << (offset % 8); + int ret; + + ret = tc3589x_reg_read(tc3589x, reg); + if (ret < 0) + return ret; + + return ret & mask; +} + +static void tc3589x_gpio_set(struct gpio_chip *chip, unsigned offset, int val) +{ + struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + u8 reg = TC3589x_GPIODATA0 + (offset / 8) * 2; + unsigned pos = offset % 8; + u8 data[] = {!!val << pos, 1 << pos}; + + tc3589x_block_write(tc3589x, reg, ARRAY_SIZE(data), data); +} + +static int tc3589x_gpio_direction_output(struct gpio_chip *chip, + unsigned offset, int val) +{ + struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + u8 reg = TC3589x_GPIODIR0 + offset / 8; + unsigned pos = offset % 8; + + tc3589x_gpio_set(chip, offset, val); + + return tc3589x_set_bits(tc3589x, reg, 1 << pos, 1 << pos); +} + +static int tc3589x_gpio_direction_input(struct gpio_chip *chip, + unsigned offset) +{ + struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + u8 reg = TC3589x_GPIODIR0 + offset / 8; + unsigned pos = offset % 8; + + return tc3589x_set_bits(tc3589x, reg, 1 << pos, 0); +} + +static int tc3589x_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + struct tc3589x_gpio *tc3589x_gpio = to_tc3589x_gpio(chip); + + return tc3589x_gpio->irq_base + offset; +} + +static struct gpio_chip template_chip = { + .label = "tc3589x", + .owner = THIS_MODULE, + .direction_input = tc3589x_gpio_direction_input, + .get = tc3589x_gpio_get, + .direction_output = tc3589x_gpio_direction_output, + .set = tc3589x_gpio_set, + .to_irq = tc3589x_gpio_to_irq, + .can_sleep = 1, +}; + +static int tc3589x_gpio_irq_set_type(unsigned int irq, unsigned int type) +{ + struct tc3589x_gpio *tc3589x_gpio = get_irq_chip_data(irq); + int offset = irq - tc3589x_gpio->irq_base; + int regoffset = offset / 8; + int mask = 1 << (offset % 8); + + if (type == IRQ_TYPE_EDGE_BOTH) { + tc3589x_gpio->regs[REG_IBE][regoffset] |= mask; + return 0; + } + + tc3589x_gpio->regs[REG_IBE][regoffset] &= ~mask; + + if (type == IRQ_TYPE_LEVEL_LOW || type == IRQ_TYPE_LEVEL_HIGH) + tc3589x_gpio->regs[REG_IS][regoffset] |= mask; + else + tc3589x_gpio->regs[REG_IS][regoffset] &= ~mask; + + if (type == IRQ_TYPE_EDGE_RISING || type == IRQ_TYPE_LEVEL_HIGH) + tc3589x_gpio->regs[REG_IEV][regoffset] |= mask; + else + tc3589x_gpio->regs[REG_IEV][regoffset] &= ~mask; + + return 0; +} + +static void tc3589x_gpio_irq_lock(unsigned int irq) +{ + struct tc3589x_gpio *tc3589x_gpio = get_irq_chip_data(irq); + + mutex_lock(&tc3589x_gpio->irq_lock); +} + +static void tc3589x_gpio_irq_sync_unlock(unsigned int irq) +{ + struct tc3589x_gpio *tc3589x_gpio = get_irq_chip_data(irq); + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + static const u8 regmap[] = { + [REG_IBE] = TC3589x_GPIOIBE0, + [REG_IEV] = TC3589x_GPIOIEV0, + [REG_IS] = TC3589x_GPIOIS0, + [REG_IE] = TC3589x_GPIOIE0, + }; + int i, j; + + for (i = 0; i < CACHE_NR_REGS; i++) { + for (j = 0; j < CACHE_NR_BANKS; j++) { + u8 old = tc3589x_gpio->oldregs[i][j]; + u8 new = tc3589x_gpio->regs[i][j]; + + if (new == old) + continue; + + tc3589x_gpio->oldregs[i][j] = new; + tc3589x_reg_write(tc3589x, regmap[i] + j * 8, new); + } + } + + mutex_unlock(&tc3589x_gpio->irq_lock); +} + +static void tc3589x_gpio_irq_mask(unsigned int irq) +{ + struct tc3589x_gpio *tc3589x_gpio = get_irq_chip_data(irq); + int offset = irq - tc3589x_gpio->irq_base; + int regoffset = offset / 8; + int mask = 1 << (offset % 8); + + tc3589x_gpio->regs[REG_IE][regoffset] &= ~mask; +} + +static void tc3589x_gpio_irq_unmask(unsigned int irq) +{ + struct tc3589x_gpio *tc3589x_gpio = get_irq_chip_data(irq); + int offset = irq - tc3589x_gpio->irq_base; + int regoffset = offset / 8; + int mask = 1 << (offset % 8); + + tc3589x_gpio->regs[REG_IE][regoffset] |= mask; +} + +static struct irq_chip tc3589x_gpio_irq_chip = { + .name = "tc3589x-gpio", + .bus_lock = tc3589x_gpio_irq_lock, + .bus_sync_unlock = tc3589x_gpio_irq_sync_unlock, + .mask = tc3589x_gpio_irq_mask, + .unmask = tc3589x_gpio_irq_unmask, + .set_type = tc3589x_gpio_irq_set_type, +}; + +static irqreturn_t tc3589x_gpio_irq(int irq, void *dev) +{ + struct tc3589x_gpio *tc3589x_gpio = dev; + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + u8 status[CACHE_NR_BANKS]; + int ret; + int i; + + ret = tc3589x_block_read(tc3589x, TC3589x_GPIOMIS0, + ARRAY_SIZE(status), status); + if (ret < 0) + return IRQ_NONE; + + for (i = 0; i < ARRAY_SIZE(status); i++) { + unsigned int stat = status[i]; + if (!stat) + continue; + + while (stat) { + int bit = __ffs(stat); + int line = i * 8 + bit; + + handle_nested_irq(tc3589x_gpio->irq_base + line); + stat &= ~(1 << bit); + } + + tc3589x_reg_write(tc3589x, TC3589x_GPIOIC0 + i, status[i]); + } + + return IRQ_HANDLED; +} + +static int tc3589x_gpio_irq_init(struct tc3589x_gpio *tc3589x_gpio) +{ + int base = tc3589x_gpio->irq_base; + int irq; + + for (irq = base; irq < base + tc3589x_gpio->chip.ngpio; irq++) { + set_irq_chip_data(irq, tc3589x_gpio); + set_irq_chip_and_handler(irq, &tc3589x_gpio_irq_chip, + handle_simple_irq); + set_irq_nested_thread(irq, 1); +#ifdef CONFIG_ARM + set_irq_flags(irq, IRQF_VALID); +#else + set_irq_noprobe(irq); +#endif + } + + return 0; +} + +static void tc3589x_gpio_irq_remove(struct tc3589x_gpio *tc3589x_gpio) +{ + int base = tc3589x_gpio->irq_base; + int irq; + + for (irq = base; irq < base + tc3589x_gpio->chip.ngpio; irq++) { +#ifdef CONFIG_ARM + set_irq_flags(irq, 0); +#endif + set_irq_chip_and_handler(irq, NULL, NULL); + set_irq_chip_data(irq, NULL); + } +} + +static int __devinit tc3589x_gpio_probe(struct platform_device *pdev) +{ + struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent); + struct tc3589x_gpio_platform_data *pdata; + struct tc3589x_gpio *tc3589x_gpio; + int ret; + int irq; + + pdata = tc3589x->pdata->gpio; + if (!pdata) + return -ENODEV; + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + tc3589x_gpio = kzalloc(sizeof(struct tc3589x_gpio), GFP_KERNEL); + if (!tc3589x_gpio) + return -ENOMEM; + + mutex_init(&tc3589x_gpio->irq_lock); + + tc3589x_gpio->dev = &pdev->dev; + tc3589x_gpio->tc3589x = tc3589x; + + tc3589x_gpio->chip = template_chip; + tc3589x_gpio->chip.ngpio = tc3589x->num_gpio; + tc3589x_gpio->chip.dev = &pdev->dev; + tc3589x_gpio->chip.base = pdata->gpio_base; + + tc3589x_gpio->irq_base = tc3589x->irq_base + TC3589x_INT_GPIO(0); + + /* Bring the GPIO module out of reset */ + ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL, + TC3589x_RSTCTRL_GPIRST, 0); + if (ret < 0) + goto out_free; + + ret = tc3589x_gpio_irq_init(tc3589x_gpio); + if (ret) + goto out_free; + + ret = request_threaded_irq(irq, NULL, tc3589x_gpio_irq, IRQF_ONESHOT, + "tc3589x-gpio", tc3589x_gpio); + if (ret) { + dev_err(&pdev->dev, "unable to get irq: %d\n", ret); + goto out_removeirq; + } + + ret = gpiochip_add(&tc3589x_gpio->chip); + if (ret) { + dev_err(&pdev->dev, "unable to add gpiochip: %d\n", ret); + goto out_freeirq; + } + + if (pdata->setup) + pdata->setup(tc3589x, tc3589x_gpio->chip.base); + + platform_set_drvdata(pdev, tc3589x_gpio); + + return 0; + +out_freeirq: + free_irq(irq, tc3589x_gpio); +out_removeirq: + tc3589x_gpio_irq_remove(tc3589x_gpio); +out_free: + kfree(tc3589x_gpio); + return ret; +} + +static int __devexit tc3589x_gpio_remove(struct platform_device *pdev) +{ + struct tc3589x_gpio *tc3589x_gpio = platform_get_drvdata(pdev); + struct tc3589x *tc3589x = tc3589x_gpio->tc3589x; + struct tc3589x_gpio_platform_data *pdata = tc3589x->pdata->gpio; + int irq = platform_get_irq(pdev, 0); + int ret; + + if (pdata->remove) + pdata->remove(tc3589x, tc3589x_gpio->chip.base); + + ret = gpiochip_remove(&tc3589x_gpio->chip); + if (ret < 0) { + dev_err(tc3589x_gpio->dev, + "unable to remove gpiochip: %d\n", ret); + return ret; + } + + free_irq(irq, tc3589x_gpio); + tc3589x_gpio_irq_remove(tc3589x_gpio); + + platform_set_drvdata(pdev, NULL); + kfree(tc3589x_gpio); + + return 0; +} + +static struct platform_driver tc3589x_gpio_driver = { + .driver.name = "tc3589x-gpio", + .driver.owner = THIS_MODULE, + .probe = tc3589x_gpio_probe, + .remove = __devexit_p(tc3589x_gpio_remove), +}; + +static int __init tc3589x_gpio_init(void) +{ + return platform_driver_register(&tc3589x_gpio_driver); +} +subsys_initcall(tc3589x_gpio_init); + +static void __exit tc3589x_gpio_exit(void) +{ + platform_driver_unregister(&tc3589x_gpio_driver); +} +module_exit(tc3589x_gpio_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("TC3589x GPIO driver"); +MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent"); diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig index 3a87f3ba5f75..c76bd3183beb 100644 --- a/drivers/input/keyboard/Kconfig +++ b/drivers/input/keyboard/Kconfig @@ -459,6 +459,16 @@ config KEYBOARD_OMAP4 To compile this driver as a module, choose M here: the module will be called omap4-keypad. +config KEYBOARD_TC3589X + tristate "TC3589X Keypad support" + depends on MFD_TC3589X + help + Say Y here if you want to use the keypad controller on + TC35892/3 I/O expander. + + To compile this driver as a module, choose M here: the + module will be called tc3589x-keypad. + config KEYBOARD_TNETV107X tristate "TI TNETV107X keypad support" depends on ARCH_DAVINCI_TNETV107X diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile index 622de73a445d..2aa6ce248b71 100644 --- a/drivers/input/keyboard/Makefile +++ b/drivers/input/keyboard/Makefile @@ -41,6 +41,7 @@ obj-$(CONFIG_KEYBOARD_SH_KEYSC) += sh_keysc.o obj-$(CONFIG_KEYBOARD_STMPE) += stmpe-keypad.o obj-$(CONFIG_KEYBOARD_STOWAWAY) += stowaway.o obj-$(CONFIG_KEYBOARD_SUNKBD) += sunkbd.o +obj-$(CONFIG_KEYBOARD_TC3589X) += tc3589x-keypad.o obj-$(CONFIG_KEYBOARD_TNETV107X) += tnetv107x-keypad.o obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o diff --git a/drivers/input/keyboard/tc3589x-keypad.c b/drivers/input/keyboard/tc3589x-keypad.c new file mode 100644 index 000000000000..69dc0cb20a00 --- /dev/null +++ b/drivers/input/keyboard/tc3589x-keypad.c @@ -0,0 +1,472 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * Author: Jayeeta Banerjee <jayeeta.banerjee@stericsson.com> + * Author: Sundar Iyer <sundar.iyer@stericsson.com> + * + * License Terms: GNU General Public License, version 2 + * + * TC35893 MFD Keypad Controller driver + */ + +#include <linux/module.h> +#include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/input.h> +#include <linux/platform_device.h> +#include <linux/input/matrix_keypad.h> +#include <linux/i2c.h> +#include <linux/slab.h> +#include <linux/mfd/tc3589x.h> + +/* Maximum supported keypad matrix row/columns size */ +#define TC3589x_MAX_KPROW 8 +#define TC3589x_MAX_KPCOL 12 + +/* keypad related Constants */ +#define TC3589x_MAX_DEBOUNCE_SETTLE 0xFF +#define DEDICATED_KEY_VAL 0xFF + +/* Pull up/down masks */ +#define TC3589x_NO_PULL_MASK 0x0 +#define TC3589x_PULL_DOWN_MASK 0x1 +#define TC3589x_PULL_UP_MASK 0x2 +#define TC3589x_PULLUP_ALL_MASK 0xAA +#define TC3589x_IO_PULL_VAL(index, mask) ((mask)<<((index)%4)*2)) + +/* Bit masks for IOCFG register */ +#define IOCFG_BALLCFG 0x01 +#define IOCFG_IG 0x08 + +#define KP_EVCODE_COL_MASK 0x0F +#define KP_EVCODE_ROW_MASK 0x70 +#define KP_RELEASE_EVT_MASK 0x80 + +#define KP_ROW_SHIFT 4 + +#define KP_NO_VALID_KEY_MASK 0x7F + +/* bit masks for RESTCTRL register */ +#define TC3589x_KBDRST 0x2 +#define TC3589x_IRQRST 0x10 +#define TC3589x_RESET_ALL 0x1B + +/* KBDMFS register bit mask */ +#define TC3589x_KBDMFS_EN 0x1 + +/* CLKEN register bitmask */ +#define KPD_CLK_EN 0x1 + +/* RSTINTCLR register bit mask */ +#define IRQ_CLEAR 0x1 + +/* bit masks for keyboard interrupts*/ +#define TC3589x_EVT_LOSS_INT 0x8 +#define TC3589x_EVT_INT 0x4 +#define TC3589x_KBD_LOSS_INT 0x2 +#define TC3589x_KBD_INT 0x1 + +/* bit masks for keyboard interrupt clear*/ +#define TC3589x_EVT_INT_CLR 0x2 +#define TC3589x_KBD_INT_CLR 0x1 + +#define TC3589x_KBD_KEYMAP_SIZE 64 + +/** + * struct tc_keypad - data structure used by keypad driver + * @input: pointer to input device object + * @board: keypad platform device + * @krow: number of rows + * @kcol: number of coloumns + * @keymap: matrix scan code table for keycodes + */ +struct tc_keypad { + struct tc3589x *tc3589x; + struct input_dev *input; + const struct tc3589x_keypad_platform_data *board; + unsigned int krow; + unsigned int kcol; + unsigned short keymap[TC3589x_KBD_KEYMAP_SIZE]; + bool keypad_stopped; +}; + +static int __devinit tc3589x_keypad_init_key_hardware(struct tc_keypad *keypad) +{ + int ret; + struct tc3589x *tc3589x = keypad->tc3589x; + u8 settle_time = keypad->board->settle_time; + u8 dbounce_period = keypad->board->debounce_period; + u8 rows = keypad->board->krow & 0xf; /* mask out the nibble */ + u8 column = keypad->board->kcol & 0xf; /* mask out the nibble */ + + /* validate platform configurations */ + if (keypad->board->kcol > TC3589x_MAX_KPCOL || + keypad->board->krow > TC3589x_MAX_KPROW || + keypad->board->debounce_period > TC3589x_MAX_DEBOUNCE_SETTLE || + keypad->board->settle_time > TC3589x_MAX_DEBOUNCE_SETTLE) + return -EINVAL; + + /* configure KBDSIZE 4 LSbits for cols and 4 MSbits for rows */ + ret = tc3589x_reg_write(tc3589x, TC3589x_KBDSIZE, + (rows << KP_ROW_SHIFT) | column); + if (ret < 0) + return ret; + + /* configure dedicated key config, no dedicated key selected */ + ret = tc3589x_reg_write(tc3589x, TC3589x_KBCFG_LSB, DEDICATED_KEY_VAL); + if (ret < 0) + return ret; + + ret = tc3589x_reg_write(tc3589x, TC3589x_KBCFG_MSB, DEDICATED_KEY_VAL); + if (ret < 0) + return ret; + + /* Configure settle time */ + ret = tc3589x_reg_write(tc3589x, TC3589x_KBDSETTLE_REG, settle_time); + if (ret < 0) + return ret; + + /* Configure debounce time */ + ret = tc3589x_reg_write(tc3589x, TC3589x_KBDBOUNCE, dbounce_period); + if (ret < 0) + return ret; + + /* Start of initialise keypad GPIOs */ + ret = tc3589x_set_bits(tc3589x, TC3589x_IOCFG, 0x0, IOCFG_IG); + if (ret < 0) + return ret; + + /* Configure pull-up resistors for all row GPIOs */ + ret = tc3589x_reg_write(tc3589x, TC3589x_IOPULLCFG0_LSB, + TC3589x_PULLUP_ALL_MASK); + if (ret < 0) + return ret; + + ret = tc3589x_reg_write(tc3589x, TC3589x_IOPULLCFG0_MSB, + TC3589x_PULLUP_ALL_MASK); + if (ret < 0) + return ret; + + /* Configure pull-up resistors for all column GPIOs */ + ret = tc3589x_reg_write(tc3589x, TC3589x_IOPULLCFG1_LSB, + TC3589x_PULLUP_ALL_MASK); + if (ret < 0) + return ret; + + ret = tc3589x_reg_write(tc3589x, TC3589x_IOPULLCFG1_MSB, + TC3589x_PULLUP_ALL_MASK); + if (ret < 0) + return ret; + + ret = tc3589x_reg_write(tc3589x, TC3589x_IOPULLCFG2_LSB, + TC3589x_PULLUP_ALL_MASK); + + return ret; +} + +#define TC35893_DATA_REGS 4 +#define TC35893_KEYCODE_FIFO_EMPTY 0x7f +#define TC35893_KEYCODE_FIFO_CLEAR 0xff +#define TC35893_KEYPAD_ROW_SHIFT 0x3 + +static irqreturn_t tc3589x_keypad_irq(int irq, void *dev) +{ + struct tc_keypad *keypad = dev; + struct tc3589x *tc3589x = keypad->tc3589x; + u8 i, row_index, col_index, kbd_code, up; + u8 code; + + for (i = 0; i < TC35893_DATA_REGS * 2; i++) { + kbd_code = tc3589x_reg_read(tc3589x, TC3589x_EVTCODE_FIFO); + + /* loop till fifo is empty and no more keys are pressed */ + if (kbd_code == TC35893_KEYCODE_FIFO_EMPTY || + kbd_code == TC35893_KEYCODE_FIFO_CLEAR) + continue; + + /* valid key is found */ + col_index = kbd_code & KP_EVCODE_COL_MASK; + row_index = (kbd_code & KP_EVCODE_ROW_MASK) >> KP_ROW_SHIFT; + code = MATRIX_SCAN_CODE(row_index, col_index, + TC35893_KEYPAD_ROW_SHIFT); + up = kbd_code & KP_RELEASE_EVT_MASK; + + input_event(keypad->input, EV_MSC, MSC_SCAN, code); + input_report_key(keypad->input, keypad->keymap[code], !up); + input_sync(keypad->input); + } + + /* clear IRQ */ + tc3589x_set_bits(tc3589x, TC3589x_KBDIC, + 0x0, TC3589x_EVT_INT_CLR | TC3589x_KBD_INT_CLR); + /* enable IRQ */ + tc3589x_set_bits(tc3589x, TC3589x_KBDMSK, + 0x0, TC3589x_EVT_LOSS_INT | TC3589x_EVT_INT); + + return IRQ_HANDLED; +} + +static int tc3589x_keypad_enable(struct tc_keypad *keypad) +{ + struct tc3589x *tc3589x = keypad->tc3589x; + int ret; + + /* pull the keypad module out of reset */ + ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL, TC3589x_KBDRST, 0x0); + if (ret < 0) + return ret; + + /* configure KBDMFS */ + ret = tc3589x_set_bits(tc3589x, TC3589x_KBDMFS, 0x0, TC3589x_KBDMFS_EN); + if (ret < 0) + return ret; + + /* enable the keypad clock */ + ret = tc3589x_set_bits(tc3589x, TC3589x_CLKEN, 0x0, KPD_CLK_EN); + if (ret < 0) + return ret; + + /* clear pending IRQs */ + ret = tc3589x_set_bits(tc3589x, TC3589x_RSTINTCLR, 0x0, 0x1); + if (ret < 0) + return ret; + + /* enable the IRQs */ + ret = tc3589x_set_bits(tc3589x, TC3589x_KBDMSK, 0x0, + TC3589x_EVT_LOSS_INT | TC3589x_EVT_INT); + if (ret < 0) + return ret; + + keypad->keypad_stopped = false; + + return ret; +} + +static int tc3589x_keypad_disable(struct tc_keypad *keypad) +{ + struct tc3589x *tc3589x = keypad->tc3589x; + int ret; + + /* clear IRQ */ + ret = tc3589x_set_bits(tc3589x, TC3589x_KBDIC, + 0x0, TC3589x_EVT_INT_CLR | TC3589x_KBD_INT_CLR); + if (ret < 0) + return ret; + + /* disable all interrupts */ + ret = tc3589x_set_bits(tc3589x, TC3589x_KBDMSK, + ~(TC3589x_EVT_LOSS_INT | TC3589x_EVT_INT), 0x0); + if (ret < 0) + return ret; + + /* disable the keypad module */ + ret = tc3589x_set_bits(tc3589x, TC3589x_CLKEN, 0x1, 0x0); + if (ret < 0) + return ret; + + /* put the keypad module into reset */ + ret = tc3589x_set_bits(tc3589x, TC3589x_RSTCTRL, TC3589x_KBDRST, 0x1); + + keypad->keypad_stopped = true; + + return ret; +} + +static int tc3589x_keypad_open(struct input_dev *input) +{ + int error; + struct tc_keypad *keypad = input_get_drvdata(input); + + /* enable the keypad module */ + error = tc3589x_keypad_enable(keypad); + if (error < 0) { + dev_err(&input->dev, "failed to enable keypad module\n"); + return error; + } + + error = tc3589x_keypad_init_key_hardware(keypad); + if (error < 0) { + dev_err(&input->dev, "failed to configure keypad module\n"); + return error; + } + + return 0; +} + +static void tc3589x_keypad_close(struct input_dev *input) +{ + struct tc_keypad *keypad = input_get_drvdata(input); + + /* disable the keypad module */ + tc3589x_keypad_disable(keypad); +} + +static int __devinit tc3589x_keypad_probe(struct platform_device *pdev) +{ + struct tc3589x *tc3589x = dev_get_drvdata(pdev->dev.parent); + struct tc_keypad *keypad; + struct input_dev *input; + const struct tc3589x_keypad_platform_data *plat; + int error, irq; + + plat = tc3589x->pdata->keypad; + if (!plat) { + dev_err(&pdev->dev, "invalid keypad platform data\n"); + return -EINVAL; + } + + irq = platform_get_irq(pdev, 0); + if (irq < 0) + return irq; + + keypad = kzalloc(sizeof(struct tc_keypad), GFP_KERNEL); + input = input_allocate_device(); + if (!keypad || !input) { + dev_err(&pdev->dev, "failed to allocate keypad memory\n"); + error = -ENOMEM; + goto err_free_mem; + } + + keypad->board = plat; + keypad->input = input; + keypad->tc3589x = tc3589x; + + input->id.bustype = BUS_I2C; + input->name = pdev->name; + input->dev.parent = &pdev->dev; + + input->keycode = keypad->keymap; + input->keycodesize = sizeof(keypad->keymap[0]); + input->keycodemax = ARRAY_SIZE(keypad->keymap); + + input->open = tc3589x_keypad_open; + input->close = tc3589x_keypad_close; + + input_set_drvdata(input, keypad); + + input_set_capability(input, EV_MSC, MSC_SCAN); + + __set_bit(EV_KEY, input->evbit); + if (!plat->no_autorepeat) + __set_bit(EV_REP, input->evbit); + + matrix_keypad_build_keymap(plat->keymap_data, 0x3, + input->keycode, input->keybit); + + error = request_threaded_irq(irq, NULL, + tc3589x_keypad_irq, plat->irqtype, + "tc3589x-keypad", keypad); + if (error < 0) { + dev_err(&pdev->dev, + "Could not allocate irq %d,error %d\n", + irq, error); + goto err_free_mem; + } + + error = input_register_device(input); + if (error) { + dev_err(&pdev->dev, "Could not register input device\n"); + goto err_free_irq; + } + + /* let platform decide if keypad is a wakeup source or not */ + device_init_wakeup(&pdev->dev, plat->enable_wakeup); + device_set_wakeup_capable(&pdev->dev, plat->enable_wakeup); + + platform_set_drvdata(pdev, keypad); + + return 0; + +err_free_irq: + free_irq(irq, keypad); +err_free_mem: + input_free_device(input); + kfree(keypad); + return error; +} + +static int __devexit tc3589x_keypad_remove(struct platform_device *pdev) +{ + struct tc_keypad *keypad = platform_get_drvdata(pdev); + int irq = platform_get_irq(pdev, 0); + + if (!keypad->keypad_stopped) + tc3589x_keypad_disable(keypad); + + free_irq(irq, keypad); + + input_unregister_device(keypad->input); + + kfree(keypad); + + return 0; +} + +#ifdef CONFIG_PM +static int tc3589x_keypad_suspend(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct tc_keypad *keypad = platform_get_drvdata(pdev); + int irq = platform_get_irq(pdev, 0); + + /* keypad is already off; we do nothing */ + if (keypad->keypad_stopped) + return 0; + + /* if device is not a wakeup source, disable it for powersave */ + if (!device_may_wakeup(&pdev->dev)) + tc3589x_keypad_disable(keypad); + else + enable_irq_wake(irq); + + return 0; +} + +static int tc3589x_keypad_resume(struct device *dev) +{ + struct platform_device *pdev = to_platform_device(dev); + struct tc_keypad *keypad = platform_get_drvdata(pdev); + int irq = platform_get_irq(pdev, 0); + + if (!keypad->keypad_stopped) + return 0; + + /* enable the device to resume normal operations */ + if (!device_may_wakeup(&pdev->dev)) + tc3589x_keypad_enable(keypad); + else + disable_irq_wake(irq); + + return 0; +} + +static const SIMPLE_DEV_PM_OPS(tc3589x_keypad_dev_pm_ops, + tc3589x_keypad_suspend, tc3589x_keypad_resume); +#endif + +static struct platform_driver tc3589x_keypad_driver = { + .driver.name = "tc3589x-keypad", + .driver.owner = THIS_MODULE, +#ifdef CONFIG_PM + .driver.pm = &tc3589x_keypad_dev_pm_ops, +#endif + .probe = tc3589x_keypad_probe, + .remove = __devexit_p(tc3589x_keypad_remove), +}; + +static int __init tc3589x_keypad_init(void) +{ + return platform_driver_register(&tc3589x_keypad_driver); +} +module_init(tc3589x_keypad_init); + +static void __exit tc3589x_keypad_exit(void) +{ + return platform_driver_unregister(&tc3589x_keypad_driver); +} +module_exit(tc3589x_keypad_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Jayeeta Banerjee/Sundar Iyer"); +MODULE_DESCRIPTION("TC35893 Keypad Driver"); +MODULE_ALIAS("platform:tc3589x-keypad") diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index 3a1493b8b5e5..e8e704f52746 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -218,12 +218,12 @@ config MFD_STMPE Keypad: stmpe-keypad Touchscreen: stmpe-ts -config MFD_TC35892 - bool "Support Toshiba TC35892" +config MFD_TC3589X + bool "Support Toshiba TC35892 and variants" depends on I2C=y && GENERIC_HARDIRQS select MFD_CORE help - Support for the Toshiba TC35892 I/O Expander. + Support for the Toshiba TC35892 and variants I/O Expander. This driver provides common support for accessing the device, additional drivers must be enabled in order to use the diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index f54b3659abbb..e590d1e44cf0 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -16,7 +16,7 @@ obj-$(CONFIG_MFD_DAVINCI_VOICECODEC) += davinci_voicecodec.o obj-$(CONFIG_MFD_DM355EVM_MSP) += dm355evm_msp.o obj-$(CONFIG_MFD_STMPE) += stmpe.o -obj-$(CONFIG_MFD_TC35892) += tc35892.o +obj-$(CONFIG_MFD_TC3589X) += tc3589x.o obj-$(CONFIG_MFD_T7L66XB) += t7l66xb.o tmio_core.o obj-$(CONFIG_MFD_TC6387XB) += tc6387xb.o tmio_core.o obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.o tmio_core.o diff --git a/drivers/mfd/tc35892.c b/drivers/mfd/tc35892.c deleted file mode 100644 index e619e2a55997..000000000000 --- a/drivers/mfd/tc35892.c +++ /dev/null @@ -1,345 +0,0 @@ -/* - * Copyright (C) ST-Ericsson SA 2010 - * - * License Terms: GNU General Public License, version 2 - * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson - * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson - */ - -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/slab.h> -#include <linux/i2c.h> -#include <linux/mfd/core.h> -#include <linux/mfd/tc35892.h> - -/** - * tc35892_reg_read() - read a single TC35892 register - * @tc35892: Device to read from - * @reg: Register to read - */ -int tc35892_reg_read(struct tc35892 *tc35892, u8 reg) -{ - int ret; - - ret = i2c_smbus_read_byte_data(tc35892->i2c, reg); - if (ret < 0) - dev_err(tc35892->dev, "failed to read reg %#x: %d\n", - reg, ret); - - return ret; -} -EXPORT_SYMBOL_GPL(tc35892_reg_read); - -/** - * tc35892_reg_read() - write a single TC35892 register - * @tc35892: Device to write to - * @reg: Register to read - * @data: Value to write - */ -int tc35892_reg_write(struct tc35892 *tc35892, u8 reg, u8 data) -{ - int ret; - - ret = i2c_smbus_write_byte_data(tc35892->i2c, reg, data); - if (ret < 0) - dev_err(tc35892->dev, "failed to write reg %#x: %d\n", - reg, ret); - - return ret; -} -EXPORT_SYMBOL_GPL(tc35892_reg_write); - -/** - * tc35892_block_read() - read multiple TC35892 registers - * @tc35892: Device to read from - * @reg: First register - * @length: Number of registers - * @values: Buffer to write to - */ -int tc35892_block_read(struct tc35892 *tc35892, u8 reg, u8 length, u8 *values) -{ - int ret; - - ret = i2c_smbus_read_i2c_block_data(tc35892->i2c, reg, length, values); - if (ret < 0) - dev_err(tc35892->dev, "failed to read regs %#x: %d\n", - reg, ret); - - return ret; -} -EXPORT_SYMBOL_GPL(tc35892_block_read); - -/** - * tc35892_block_write() - write multiple TC35892 registers - * @tc35892: Device to write to - * @reg: First register - * @length: Number of registers - * @values: Values to write - */ -int tc35892_block_write(struct tc35892 *tc35892, u8 reg, u8 length, - const u8 *values) -{ - int ret; - - ret = i2c_smbus_write_i2c_block_data(tc35892->i2c, reg, length, - values); - if (ret < 0) - dev_err(tc35892->dev, "failed to write regs %#x: %d\n", - reg, ret); - - return ret; -} -EXPORT_SYMBOL_GPL(tc35892_block_write); - -/** - * tc35892_set_bits() - set the value of a bitfield in a TC35892 register - * @tc35892: Device to write to - * @reg: Register to write - * @mask: Mask of bits to set - * @values: Value to set - */ -int tc35892_set_bits(struct tc35892 *tc35892, u8 reg, u8 mask, u8 val) -{ - int ret; - - mutex_lock(&tc35892->lock); - - ret = tc35892_reg_read(tc35892, reg); - if (ret < 0) - goto out; - - ret &= ~mask; - ret |= val; - - ret = tc35892_reg_write(tc35892, reg, ret); - -out: - mutex_unlock(&tc35892->lock); - return ret; -} -EXPORT_SYMBOL_GPL(tc35892_set_bits); - -static struct resource gpio_resources[] = { - { - .start = TC35892_INT_GPIIRQ, - .end = TC35892_INT_GPIIRQ, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct mfd_cell tc35892_devs[] = { - { - .name = "tc35892-gpio", - .num_resources = ARRAY_SIZE(gpio_resources), - .resources = &gpio_resources[0], - }, -}; - -static irqreturn_t tc35892_irq(int irq, void *data) -{ - struct tc35892 *tc35892 = data; - int status; - - status = tc35892_reg_read(tc35892, TC35892_IRQST); - if (status < 0) - return IRQ_NONE; - - while (status) { - int bit = __ffs(status); - - handle_nested_irq(tc35892->irq_base + bit); - status &= ~(1 << bit); - } - - /* - * A dummy read or write (to any register) appears to be necessary to - * have the last interrupt clear (for example, GPIO IC write) take - * effect. - */ - tc35892_reg_read(tc35892, TC35892_IRQST); - - return IRQ_HANDLED; -} - -static void tc35892_irq_dummy(unsigned int irq) -{ - /* No mask/unmask at this level */ -} - -static struct irq_chip tc35892_irq_chip = { - .name = "tc35892", - .mask = tc35892_irq_dummy, - .unmask = tc35892_irq_dummy, -}; - -static int tc35892_irq_init(struct tc35892 *tc35892) -{ - int base = tc35892->irq_base; - int irq; - - for (irq = base; irq < base + TC35892_NR_INTERNAL_IRQS; irq++) { - set_irq_chip_data(irq, tc35892); - set_irq_chip_and_handler(irq, &tc35892_irq_chip, - handle_edge_irq); - set_irq_nested_thread(irq, 1); -#ifdef CONFIG_ARM - set_irq_flags(irq, IRQF_VALID); -#else - set_irq_noprobe(irq); -#endif - } - - return 0; -} - -static void tc35892_irq_remove(struct tc35892 *tc35892) -{ - int base = tc35892->irq_base; - int irq; - - for (irq = base; irq < base + TC35892_NR_INTERNAL_IRQS; irq++) { -#ifdef CONFIG_ARM - set_irq_flags(irq, 0); -#endif - set_irq_chip_and_handler(irq, NULL, NULL); - set_irq_chip_data(irq, NULL); - } -} - -static int tc35892_chip_init(struct tc35892 *tc35892) -{ - int manf, ver, ret; - - manf = tc35892_reg_read(tc35892, TC35892_MANFCODE); - if (manf < 0) - return manf; - - ver = tc35892_reg_read(tc35892, TC35892_VERSION); - if (ver < 0) - return ver; - - if (manf != TC35892_MANFCODE_MAGIC) { - dev_err(tc35892->dev, "unknown manufacturer: %#x\n", manf); - return -EINVAL; - } - - dev_info(tc35892->dev, "manufacturer: %#x, version: %#x\n", manf, ver); - - /* Put everything except the IRQ module into reset */ - ret = tc35892_reg_write(tc35892, TC35892_RSTCTRL, - TC35892_RSTCTRL_TIMRST - | TC35892_RSTCTRL_ROTRST - | TC35892_RSTCTRL_KBDRST - | TC35892_RSTCTRL_GPIRST); - if (ret < 0) - return ret; - - /* Clear the reset interrupt. */ - return tc35892_reg_write(tc35892, TC35892_RSTINTCLR, 0x1); -} - -static int __devinit tc35892_probe(struct i2c_client *i2c, - const struct i2c_device_id *id) -{ - struct tc35892_platform_data *pdata = i2c->dev.platform_data; - struct tc35892 *tc35892; - int ret; - - if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_BYTE_DATA - | I2C_FUNC_SMBUS_I2C_BLOCK)) - return -EIO; - - tc35892 = kzalloc(sizeof(struct tc35892), GFP_KERNEL); - if (!tc35892) - return -ENOMEM; - - mutex_init(&tc35892->lock); - - tc35892->dev = &i2c->dev; - tc35892->i2c = i2c; - tc35892->pdata = pdata; - tc35892->irq_base = pdata->irq_base; - tc35892->num_gpio = id->driver_data; - - i2c_set_clientdata(i2c, tc35892); - - ret = tc35892_chip_init(tc35892); - if (ret) - goto out_free; - - ret = tc35892_irq_init(tc35892); - if (ret) - goto out_free; - - ret = request_threaded_irq(tc35892->i2c->irq, NULL, tc35892_irq, - IRQF_TRIGGER_FALLING | IRQF_ONESHOT, - "tc35892", tc35892); - if (ret) { - dev_err(tc35892->dev, "failed to request IRQ: %d\n", ret); - goto out_removeirq; - } - - ret = mfd_add_devices(tc35892->dev, -1, tc35892_devs, - ARRAY_SIZE(tc35892_devs), NULL, - tc35892->irq_base); - if (ret) { - dev_err(tc35892->dev, "failed to add children\n"); - goto out_freeirq; - } - - return 0; - -out_freeirq: - free_irq(tc35892->i2c->irq, tc35892); -out_removeirq: - tc35892_irq_remove(tc35892); -out_free: - kfree(tc35892); - return ret; -} - -static int __devexit tc35892_remove(struct i2c_client *client) -{ - struct tc35892 *tc35892 = i2c_get_clientdata(client); - - mfd_remove_devices(tc35892->dev); - - free_irq(tc35892->i2c->irq, tc35892); - tc35892_irq_remove(tc35892); - - kfree(tc35892); - - return 0; -} - -static const struct i2c_device_id tc35892_id[] = { - { "tc35892", 24 }, - { } -}; -MODULE_DEVICE_TABLE(i2c, tc35892_id); - -static struct i2c_driver tc35892_driver = { - .driver.name = "tc35892", - .driver.owner = THIS_MODULE, - .probe = tc35892_probe, - .remove = __devexit_p(tc35892_remove), - .id_table = tc35892_id, -}; - -static int __init tc35892_init(void) -{ - return i2c_add_driver(&tc35892_driver); -} -subsys_initcall(tc35892_init); - -static void __exit tc35892_exit(void) -{ - i2c_del_driver(&tc35892_driver); -} -module_exit(tc35892_exit); - -MODULE_LICENSE("GPL v2"); -MODULE_DESCRIPTION("TC35892 MFD core driver"); -MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent"); diff --git a/drivers/mfd/tc3589x.c b/drivers/mfd/tc3589x.c new file mode 100644 index 000000000000..729dbeed2ce0 --- /dev/null +++ b/drivers/mfd/tc3589x.c @@ -0,0 +1,422 @@ +/* + * Copyright (C) ST-Ericsson SA 2010 + * + * License Terms: GNU General Public License, version 2 + * Author: Hanumath Prasad <hanumath.prasad@stericsson.com> for ST-Ericsson + * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson + */ + +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/slab.h> +#include <linux/i2c.h> +#include <linux/mfd/core.h> +#include <linux/mfd/tc3589x.h> + +#define TC3589x_CLKMODE_MODCTL_SLEEP 0x0 +#define TC3589x_CLKMODE_MODCTL_OPERATION (1 << 0) + +/** + * tc3589x_reg_read() - read a single TC3589x register + * @tc3589x: Device to read from + * @reg: Register to read + */ +int tc3589x_reg_read(struct tc3589x *tc3589x, u8 reg) +{ + int ret; + + ret = i2c_smbus_read_byte_data(tc3589x->i2c, reg); + if (ret < 0) + dev_err(tc3589x->dev, "failed to read reg %#x: %d\n", + reg, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(tc3589x_reg_read); + +/** + * tc3589x_reg_read() - write a single TC3589x register + * @tc3589x: Device to write to + * @reg: Register to read + * @data: Value to write + */ +int tc3589x_reg_write(struct tc3589x *tc3589x, u8 reg, u8 data) +{ + int ret; + + ret = i2c_smbus_write_byte_data(tc3589x->i2c, reg, data); + if (ret < 0) + dev_err(tc3589x->dev, "failed to write reg %#x: %d\n", + reg, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(tc3589x_reg_write); + +/** + * tc3589x_block_read() - read multiple TC3589x registers + * @tc3589x: Device to read from + * @reg: First register + * @length: Number of registers + * @values: Buffer to write to + */ +int tc3589x_block_read(struct tc3589x *tc3589x, u8 reg, u8 length, u8 *values) +{ + int ret; + + ret = i2c_smbus_read_i2c_block_data(tc3589x->i2c, reg, length, values); + if (ret < 0) + dev_err(tc3589x->dev, "failed to read regs %#x: %d\n", + reg, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(tc3589x_block_read); + +/** + * tc3589x_block_write() - write multiple TC3589x registers + * @tc3589x: Device to write to + * @reg: First register + * @length: Number of registers + * @values: Values to write + */ +int tc3589x_block_write(struct tc3589x *tc3589x, u8 reg, u8 length, + const u8 *values) +{ + int ret; + + ret = i2c_smbus_write_i2c_block_data(tc3589x->i2c, reg, length, + values); + if (ret < 0) + dev_err(tc3589x->dev, "failed to write regs %#x: %d\n", + reg, ret); + + return ret; +} +EXPORT_SYMBOL_GPL(tc3589x_block_write); + +/** + * tc3589x_set_bits() - set the value of a bitfield in a TC3589x register + * @tc3589x: Device to write to + * @reg: Register to write + * @mask: Mask of bits to set + * @values: Value to set + */ +int tc3589x_set_bits(struct tc3589x *tc3589x, u8 reg, u8 mask, u8 val) +{ + int ret; + + mutex_lock(&tc3589x->lock); + + ret = tc3589x_reg_read(tc3589x, reg); + if (ret < 0) + goto out; + + ret &= ~mask; + ret |= val; + + ret = tc3589x_reg_write(tc3589x, reg, ret); + +out: + mutex_unlock(&tc3589x->lock); + return ret; +} +EXPORT_SYMBOL_GPL(tc3589x_set_bits); + +static struct resource gpio_resources[] = { + { + .start = TC3589x_INT_GPIIRQ, + .end = TC3589x_INT_GPIIRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct resource keypad_resources[] = { + { + .start = TC3589x_INT_KBDIRQ, + .end = TC3589x_INT_KBDIRQ, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct mfd_cell tc3589x_dev_gpio[] = { + { + .name = "tc3589x-gpio", + .num_resources = ARRAY_SIZE(gpio_resources), + .resources = &gpio_resources[0], + }, +}; + +static struct mfd_cell tc3589x_dev_keypad[] = { + { + .name = "tc3589x-keypad", + .num_resources = ARRAY_SIZE(keypad_resources), + .resources = &keypad_resources[0], + }, +}; + +static irqreturn_t tc3589x_irq(int irq, void *data) +{ + struct tc3589x *tc3589x = data; + int status; + +again: + status = tc3589x_reg_read(tc3589x, TC3589x_IRQST); + if (status < 0) + return IRQ_NONE; + + while (status) { + int bit = __ffs(status); + + handle_nested_irq(tc3589x->irq_base + bit); + status &= ~(1 << bit); + } + + /* + * A dummy read or write (to any register) appears to be necessary to + * have the last interrupt clear (for example, GPIO IC write) take + * effect. In such a case, recheck for any interrupt which is still + * pending. + */ + status = tc3589x_reg_read(tc3589x, TC3589x_IRQST); + if (status) + goto again; + + return IRQ_HANDLED; +} + +static int tc3589x_irq_init(struct tc3589x *tc3589x) +{ + int base = tc3589x->irq_base; + int irq; + + for (irq = base; irq < base + TC3589x_NR_INTERNAL_IRQS; irq++) { + set_irq_chip_data(irq, tc3589x); + set_irq_chip_and_handler(irq, &dummy_irq_chip, + handle_edge_irq); + set_irq_nested_thread(irq, 1); +#ifdef CONFIG_ARM + set_irq_flags(irq, IRQF_VALID); +#else + set_irq_noprobe(irq); +#endif + } + + return 0; +} + +static void tc3589x_irq_remove(struct tc3589x *tc3589x) +{ + int base = tc3589x->irq_base; + int irq; + + for (irq = base; irq < base + TC3589x_NR_INTERNAL_IRQS; irq++) { +#ifdef CONFIG_ARM + set_irq_flags(irq, 0); +#endif + set_irq_chip_and_handler(irq, NULL, NULL); + set_irq_chip_data(irq, NULL); + } +} + +static int tc3589x_chip_init(struct tc3589x *tc3589x) +{ + int manf, ver, ret; + + manf = tc3589x_reg_read(tc3589x, TC3589x_MANFCODE); + if (manf < 0) + return manf; + + ver = tc3589x_reg_read(tc3589x, TC3589x_VERSION); + if (ver < 0) + return ver; + + if (manf != TC3589x_MANFCODE_MAGIC) { + dev_err(tc3589x->dev, "unknown manufacturer: %#x\n", manf); + return -EINVAL; + } + + dev_info(tc3589x->dev, "manufacturer: %#x, version: %#x\n", manf, ver); + + /* + * Put everything except the IRQ module into reset; + * also spare the GPIO module for any pin initialization + * done during pre-kernel boot + */ + ret = tc3589x_reg_write(tc3589x, TC3589x_RSTCTRL, + TC3589x_RSTCTRL_TIMRST + | TC3589x_RSTCTRL_ROTRST + | TC3589x_RSTCTRL_KBDRST); + if (ret < 0) + return ret; + + /* Clear the reset interrupt. */ + return tc3589x_reg_write(tc3589x, TC3589x_RSTINTCLR, 0x1); +} + +static int __devinit tc3589x_device_init(struct tc3589x *tc3589x) +{ + int ret = 0; + unsigned int blocks = tc3589x->pdata->block; + + if (blocks & TC3589x_BLOCK_GPIO) { + ret = mfd_add_devices(tc3589x->dev, -1, tc3589x_dev_gpio, + ARRAY_SIZE(tc3589x_dev_gpio), NULL, + tc3589x->irq_base); + if (ret) { + dev_err(tc3589x->dev, "failed to add gpio child\n"); + return ret; + } + dev_info(tc3589x->dev, "added gpio block\n"); + } + + if (blocks & TC3589x_BLOCK_KEYPAD) { + ret = mfd_add_devices(tc3589x->dev, -1, tc3589x_dev_keypad, + ARRAY_SIZE(tc3589x_dev_keypad), NULL, + tc3589x->irq_base); + if (ret) { + dev_err(tc3589x->dev, "failed to keypad child\n"); + return ret; + } + dev_info(tc3589x->dev, "added keypad block\n"); + } + + return ret; +} + +static int __devinit tc3589x_probe(struct i2c_client *i2c, + const struct i2c_device_id *id) +{ + struct tc3589x_platform_data *pdata = i2c->dev.platform_data; + struct tc3589x *tc3589x; + int ret; + + if (!i2c_check_functionality(i2c->adapter, I2C_FUNC_SMBUS_BYTE_DATA + | I2C_FUNC_SMBUS_I2C_BLOCK)) + return -EIO; + + tc3589x = kzalloc(sizeof(struct tc3589x), GFP_KERNEL); + if (!tc3589x) + return -ENOMEM; + + mutex_init(&tc3589x->lock); + + tc3589x->dev = &i2c->dev; + tc3589x->i2c = i2c; + tc3589x->pdata = pdata; + tc3589x->irq_base = pdata->irq_base; + tc3589x->num_gpio = id->driver_data; + + i2c_set_clientdata(i2c, tc3589x); + + ret = tc3589x_chip_init(tc3589x); + if (ret) + goto out_free; + + ret = tc3589x_irq_init(tc3589x); + if (ret) + goto out_free; + + ret = request_threaded_irq(tc3589x->i2c->irq, NULL, tc3589x_irq, + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + "tc3589x", tc3589x); + if (ret) { + dev_err(tc3589x->dev, "failed to request IRQ: %d\n", ret); + goto out_removeirq; + } + + ret = tc3589x_device_init(tc3589x); + if (ret) { + dev_err(tc3589x->dev, "failed to add child devices\n"); + goto out_freeirq; + } + + return 0; + +out_freeirq: + free_irq(tc3589x->i2c->irq, tc3589x); +out_removeirq: + tc3589x_irq_remove(tc3589x); +out_free: + kfree(tc3589x); + return ret; +} + +static int __devexit tc3589x_remove(struct i2c_client *client) +{ + struct tc3589x *tc3589x = i2c_get_clientdata(client); + + mfd_remove_devices(tc3589x->dev); + + free_irq(tc3589x->i2c->irq, tc3589x); + tc3589x_irq_remove(tc3589x); + + kfree(tc3589x); + + return 0; +} + +static int tc3589x_suspend(struct device *dev) +{ + struct tc3589x *tc3589x = dev_get_drvdata(dev); + struct i2c_client *client = tc3589x->i2c; + int ret = 0; + + /* put the system to sleep mode */ + if (!device_may_wakeup(&client->dev)) + ret = tc3589x_reg_write(tc3589x, TC3589x_CLKMODE, + TC3589x_CLKMODE_MODCTL_SLEEP); + + return ret; +} + +static int tc3589x_resume(struct device *dev) +{ + struct tc3589x *tc3589x = dev_get_drvdata(dev); + struct i2c_client *client = tc3589x->i2c; + int ret = 0; + + /* enable the system into operation */ + if (!device_may_wakeup(&client->dev)) + ret = tc3589x_reg_write(tc3589x, TC3589x_CLKMODE, + TC3589x_CLKMODE_MODCTL_OPERATION); + + return ret; +} + +static const SIMPLE_DEV_PM_OPS(tc3589x_dev_pm_ops, tc3589x_suspend, + tc3589x_resume); + +static const struct i2c_device_id tc3589x_id[] = { + { "tc3589x", 24 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, tc3589x_id); + +static struct i2c_driver tc3589x_driver = { + .driver.name = "tc3589x", + .driver.owner = THIS_MODULE, +#ifdef CONFIG_PM + .driver.pm = &tc3589x_dev_pm_ops, +#endif + .probe = tc3589x_probe, + .remove = __devexit_p(tc3589x_remove), + .id_table = tc3589x_id, +}; + +static int __init tc3589x_init(void) +{ + return i2c_add_driver(&tc3589x_driver); +} +subsys_initcall(tc3589x_init); + +static void __exit tc3589x_exit(void) +{ + i2c_del_driver(&tc3589x_driver); +} +module_exit(tc3589x_exit); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("TC3589x MFD core driver"); +MODULE_AUTHOR("Hanumath Prasad, Rabin Vincent"); diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 87b4fc6c98c2..563022825667 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -19,6 +19,7 @@ #include <linux/highmem.h> #include <linux/log2.h> #include <linux/mmc/host.h> +#include <linux/mmc/card.h> #include <linux/amba/bus.h> #include <linux/clk.h> #include <linux/scatterlist.h> @@ -45,6 +46,12 @@ static unsigned int fmax = 515633; * is asserted (likewise for RX) * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY * is asserted (likewise for RX) + * @broken_blockend: the MCI_DATABLOCKEND is broken on the hardware + * and will not work at all. + * @broken_blockend_dma: the MCI_DATABLOCKEND is broken on the hardware when + * using DMA. + * @sdio: variant supports SDIO + * @st_clkdiv: true if using a ST-specific clock divider algorithm */ struct variant_data { unsigned int clkreg; @@ -52,6 +59,10 @@ struct variant_data { unsigned int datalength_bits; unsigned int fifosize; unsigned int fifohalfsize; + bool broken_blockend; + bool broken_blockend_dma; + bool sdio; + bool st_clkdiv; }; static struct variant_data variant_arm = { @@ -65,6 +76,8 @@ static struct variant_data variant_u300 = { .fifohalfsize = 8 * 4, .clkreg_enable = 1 << 13, /* HWFCEN */ .datalength_bits = 16, + .broken_blockend_dma = true, + .sdio = true, }; static struct variant_data variant_ux500 = { @@ -73,7 +86,11 @@ static struct variant_data variant_ux500 = { .clkreg = MCI_CLK_ENABLE, .clkreg_enable = 1 << 14, /* HWFCEN */ .datalength_bits = 24, + .broken_blockend = true, + .sdio = true, + .st_clkdiv = true, }; + /* * This must be called with host->lock held */ @@ -86,7 +103,22 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) if (desired >= host->mclk) { clk = MCI_CLK_BYPASS; host->cclk = host->mclk; + } else if (variant->st_clkdiv) { + /* + * DB8500 TRM says f = mclk / (clkdiv + 2) + * => clkdiv = (mclk / f) - 2 + * Round the divider up so we don't exceed the max + * frequency + */ + clk = DIV_ROUND_UP(host->mclk, desired) - 2; + if (clk >= 256) + clk = 255; + host->cclk = host->mclk / (clk + 2); } else { + /* + * PL180 TRM says f = mclk / (2 * (clkdiv + 1)) + * => clkdiv = mclk / (2 * f) - 1 + */ clk = host->mclk / (2 * desired) - 1; if (clk >= 256) clk = 255; @@ -129,10 +161,26 @@ mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) spin_lock(&host->lock); } +static void mmci_set_mask1(struct mmci_host *host, unsigned int mask) +{ + void __iomem *base = host->base; + + if (host->singleirq) { + unsigned int mask0 = readl(base + MMCIMASK0); + + mask0 &= ~MCI_IRQ1MASK; + mask0 |= mask; + + writel(mask0, base + MMCIMASK0); + } + + writel(mask, base + MMCIMASK1); +} + static void mmci_stop_data(struct mmci_host *host) { writel(0, host->base + MMCIDATACTRL); - writel(0, host->base + MMCIMASK1); + mmci_set_mask1(host, 0); host->data = NULL; } @@ -162,6 +210,8 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) host->data = data; host->size = data->blksz * data->blocks; host->data_xfered = 0; + host->blockend = false; + host->dataend = false; mmci_init_sg(host, data); @@ -196,9 +246,14 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) irqmask = MCI_TXFIFOHALFEMPTYMASK; } + /* The ST Micro variants has a special bit to enable SDIO */ + if (variant->sdio && host->mmc->card) + if (mmc_card_sdio(host->mmc->card)) + datactrl |= MCI_ST_DPSM_SDIOEN; + writel(datactrl, base + MMCIDATACTRL); writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0); - writel(irqmask, base + MMCIMASK1); + mmci_set_mask1(host, irqmask); } static void @@ -233,20 +288,9 @@ static void mmci_data_irq(struct mmci_host *host, struct mmc_data *data, unsigned int status) { - if (status & MCI_DATABLOCKEND) { - host->data_xfered += data->blksz; -#ifdef CONFIG_ARCH_U300 - /* - * On the U300 some signal or other is - * badly routed so that a data write does - * not properly terminate with a MCI_DATAEND - * status flag. This quirk will make writes - * work again. - */ - if (data->flags & MMC_DATA_WRITE) - status |= MCI_DATAEND; -#endif - } + struct variant_data *variant = host->variant; + + /* First check for errors */ if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { dev_dbg(mmc_dev(host->mmc), "MCI ERROR IRQ (status %08x)\n", status); if (status & MCI_DATACRCFAIL) @@ -255,7 +299,10 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, data->error = -ETIMEDOUT; else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN)) data->error = -EIO; - status |= MCI_DATAEND; + + /* Force-complete the transaction */ + host->blockend = true; + host->dataend = true; /* * We hit an error condition. Ensure that any data @@ -273,9 +320,64 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, local_irq_restore(flags); } } - if (status & MCI_DATAEND) { + + /* + * On ARM variants in PIO mode, MCI_DATABLOCKEND + * is always sent first, and we increase the + * transfered number of bytes for that IRQ. Then + * MCI_DATAEND follows and we conclude the transaction. + * + * On the Ux500 single-IRQ variant MCI_DATABLOCKEND + * doesn't seem to immediately clear from the status, + * so we can't use it keep count when only one irq is + * used because the irq will hit for other reasons, and + * then the flag is still up. So we use the MCI_DATAEND + * IRQ at the end of the entire transfer because + * MCI_DATABLOCKEND is broken. + * + * In the U300, the IRQs can arrive out-of-order, + * e.g. MCI_DATABLOCKEND sometimes arrives after MCI_DATAEND, + * so for this case we use the flags "blockend" and + * "dataend" to make sure both IRQs have arrived before + * concluding the transaction. (This does not apply + * to the Ux500 which doesn't fire MCI_DATABLOCKEND + * at all.) In DMA mode it suffers from the same problem + * as the Ux500. + */ + if (status & MCI_DATABLOCKEND) { + /* + * Just being a little over-cautious, we do not + * use this progressive update if the hardware blockend + * flag is unreliable: since it can stay high between + * IRQs it will corrupt the transfer counter. + */ + if (!variant->broken_blockend) + host->data_xfered += data->blksz; + host->blockend = true; + } + + if (status & MCI_DATAEND) + host->dataend = true; + + /* + * On variants with broken blockend we shall only wait for dataend, + * on others we must sync with the blockend signal since they can + * appear out-of-order. + */ + if (host->dataend && (host->blockend || variant->broken_blockend)) { mmci_stop_data(host); + /* Reset these flags */ + host->blockend = false; + host->dataend = false; + + /* + * Variants with broken blockend flags need to handle the + * end of the entire transfer here. + */ + if (variant->broken_blockend && !data->error) + host->data_xfered += data->blksz * data->blocks; + if (!data->stop) { mmci_request_end(host, data->mrq); } else { @@ -356,7 +458,32 @@ static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int rem variant->fifosize : variant->fifohalfsize; count = min(remain, maxcnt); - writesl(base + MMCIFIFO, ptr, count >> 2); + /* + * The ST Micro variant for SDIO transfer sizes + * less then 8 bytes should have clock H/W flow + * control disabled. + */ + if (variant->sdio && + mmc_card_sdio(host->mmc->card)) { + if (count < 8) + writel(readl(host->base + MMCICLOCK) & + ~variant->clkreg_enable, + host->base + MMCICLOCK); + else + writel(readl(host->base + MMCICLOCK) | + variant->clkreg_enable, + host->base + MMCICLOCK); + } + + /* + * SDIO especially may want to send something that is + * not divisible by 4 (as opposed to card sectors + * etc), and the FIFO only accept full 32-bit writes. + * So compensate by adding +3 on the count, a single + * byte become a 32bit write, 7 bytes will be two + * 32bit writes etc. + */ + writesl(base + MMCIFIFO, ptr, (count + 3) >> 2); ptr += count; remain -= count; @@ -437,7 +564,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) * "any data available" mode. */ if (status & MCI_RXACTIVE && host->size < variant->fifosize) - writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1); + mmci_set_mask1(host, MCI_RXDATAAVLBLMASK); /* * If we run out of data, disable the data IRQs; this @@ -446,7 +573,7 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) * stops us racing with our data end IRQ. */ if (host->size == 0) { - writel(0, base + MMCIMASK1); + mmci_set_mask1(host, 0); writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0); } @@ -469,6 +596,14 @@ static irqreturn_t mmci_irq(int irq, void *dev_id) struct mmc_data *data; status = readl(host->base + MMCISTATUS); + + if (host->singleirq) { + if (status & readl(host->base + MMCIMASK1)) + mmci_pio_irq(irq, dev_id); + + status &= ~MCI_IRQ1MASK; + } + status &= readl(host->base + MMCIMASK0); writel(status, host->base + MMCICLEAR); @@ -635,6 +770,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) struct variant_data *variant = id->data; struct mmci_host *host; struct mmc_host *mmc; + unsigned int mask; int ret; /* must have platform data */ @@ -806,20 +942,30 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) if (ret) goto unmap; - ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host); - if (ret) - goto irq0_free; + if (dev->irq[1] == NO_IRQ) + host->singleirq = true; + else { + ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, + DRIVER_NAME " (pio)", host); + if (ret) + goto irq0_free; + } - writel(MCI_IRQENABLE, host->base + MMCIMASK0); + mask = MCI_IRQENABLE; + /* Don't use the datablockend flag if it's broken */ + if (variant->broken_blockend) + mask &= ~MCI_DATABLOCKEND; - amba_set_drvdata(dev, mmc); + writel(mask, host->base + MMCIMASK0); - mmc_add_host(mmc); + amba_set_drvdata(dev, mmc); - dev_info(&dev->dev, "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n", - mmc_hostname(mmc), amba_rev(dev), amba_config(dev), + dev_info(&dev->dev, "%s: PL%03x rev%u at 0x%08llx irq %d,%d\n", + mmc_hostname(mmc), amba_part(dev), amba_rev(dev), (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]); + mmc_add_host(mmc); + return 0; irq0_free: @@ -864,7 +1010,8 @@ static int __devexit mmci_remove(struct amba_device *dev) writel(0, host->base + MMCIDATACTRL); free_irq(dev->irq[0], host); - free_irq(dev->irq[1], host); + if (!host->singleirq) + free_irq(dev->irq[1], host); if (host->gpio_wp != -ENOSYS) gpio_free(host->gpio_wp); diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index 4ae887fc0189..df06f01aac89 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -139,6 +139,11 @@ MCI_DATATIMEOUTMASK|MCI_TXUNDERRUNMASK|MCI_RXOVERRUNMASK| \ MCI_CMDRESPENDMASK|MCI_CMDSENTMASK|MCI_DATABLOCKENDMASK) +/* These interrupts are directed to IRQ1 when two IRQ lines are available */ +#define MCI_IRQ1MASK \ + (MCI_RXFIFOHALFFULLMASK | MCI_RXDATAAVLBLMASK | \ + MCI_TXFIFOHALFEMPTYMASK) + #define NR_SG 16 struct clk; @@ -154,6 +159,7 @@ struct mmci_host { int gpio_cd; int gpio_wp; int gpio_cd_irq; + bool singleirq; unsigned int data_xfered; @@ -171,6 +177,9 @@ struct mmci_host { struct timer_list timer; unsigned int oldstat; + bool blockend; + bool dataend; + /* pio stuff */ struct sg_mapping_iter sg_miter; unsigned int size; diff --git a/drivers/net/caif/caif_shm_u5500.c b/drivers/net/caif/caif_shm_u5500.c index 32b1c6fb2de1..5f771ab712c4 100644 --- a/drivers/net/caif/caif_shm_u5500.c +++ b/drivers/net/caif/caif_shm_u5500.c @@ -11,7 +11,7 @@ #include <linux/init.h> #include <linux/module.h> #include <linux/netdevice.h> -#include <mach/mbox.h> +#include <mach/mbox-db5500.h> #include <net/caif/caif_shm.h> MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig index c80a7a6e7698..de886f3dfd39 100644 --- a/drivers/pcmcia/Kconfig +++ b/drivers/pcmcia/Kconfig @@ -215,7 +215,8 @@ config PCMCIA_PXA2XX depends on (ARCH_LUBBOCK || MACH_MAINSTONE || PXA_SHARPSL \ || MACH_ARMCORE || ARCH_PXA_PALM || TRIZEPS_PCMCIA \ || ARCOM_PCMCIA || ARCH_PXA_ESERIES || MACH_STARGATE2 \ - || MACH_VPAC270 || MACH_BALLOON3) + || MACH_VPAC270 || MACH_BALLOON3 || MACH_COLIBRI \ + || MACH_COLIBRI320) select PCMCIA_SOC_COMMON help Say Y here to include support for the PXA2xx PCMCIA controller diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index 8d9386a22eb3..29935ea921df 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile @@ -50,8 +50,9 @@ sa1111_cs-$(CONFIG_SA1100_JORNADA720) += sa1100_jornada720.o sa1100_cs-y += sa1100_generic.o sa1100_cs-$(CONFIG_SA1100_ASSABET) += sa1100_assabet.o sa1100_cs-$(CONFIG_SA1100_CERF) += sa1100_cerf.o -sa1100_cs-$(CONFIG_SA1100_COLLIE) += pxa2xx_sharpsl.o +sa1100_cs-$(CONFIG_SA1100_COLLIE) += pxa2xx_sharpsl.o sa1100_cs-$(CONFIG_SA1100_H3600) += sa1100_h3600.o +sa1100_cs-$(CONFIG_SA1100_NANOENGINE) += sa1100_nanoengine.o sa1100_cs-$(CONFIG_SA1100_SHANNON) += sa1100_shannon.o sa1100_cs-$(CONFIG_SA1100_SIMPAD) += sa1100_simpad.o @@ -70,6 +71,8 @@ pxa2xx-obj-$(CONFIG_MACH_E740) += pxa2xx_e740.o pxa2xx-obj-$(CONFIG_MACH_STARGATE2) += pxa2xx_stargate2.o pxa2xx-obj-$(CONFIG_MACH_VPAC270) += pxa2xx_vpac270.o pxa2xx-obj-$(CONFIG_MACH_BALLOON3) += pxa2xx_balloon3.o +pxa2xx-obj-$(CONFIG_MACH_COLIBRI) += pxa2xx_colibri.o +pxa2xx-obj-$(CONFIG_MACH_COLIBRI320) += pxa2xx_colibri.o obj-$(CONFIG_PCMCIA_PXA2XX) += pxa2xx_base.o $(pxa2xx-obj-y) diff --git a/drivers/pcmcia/pxa2xx_balloon3.c b/drivers/pcmcia/pxa2xx_balloon3.c index dbbdd0063202..453c54c97612 100644 --- a/drivers/pcmcia/pxa2xx_balloon3.c +++ b/drivers/pcmcia/pxa2xx_balloon3.c @@ -39,12 +39,10 @@ static struct pcmcia_irqs irqs[] = { static int balloon3_pcmcia_hw_init(struct soc_pcmcia_socket *skt) { uint16_t ver; - int ret; - static void __iomem *fpga_ver; ver = __raw_readw(BALLOON3_FPGA_VER); - if (ver > 0x0201) - pr_warn("The FPGA code, version 0x%04x, is newer than rel-0.3. " + if (ver < 0x4f08) + pr_warn("The FPGA code, version 0x%04x, is too old. " "PCMCIA/CF support might be broken in this version!", ver); @@ -97,8 +95,9 @@ static void balloon3_pcmcia_socket_state(struct soc_pcmcia_socket *skt, static int balloon3_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, const socket_state_t *state) { - __raw_writew((state->flags & SS_RESET) ? BALLOON3_CF_RESET : 0, - BALLOON3_CF_CONTROL_REG); + __raw_writew(BALLOON3_CF_RESET, BALLOON3_CF_CONTROL_REG | + ((state->flags & SS_RESET) ? + BALLOON3_FPGA_SETnCLR : 0)); return 0; } diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index ae07b4db8a6e..3755e7c8c715 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c @@ -26,6 +26,7 @@ #include <linux/platform_device.h> #include <mach/hardware.h> +#include <mach/smemc.h> #include <asm/io.h> #include <asm/irq.h> #include <asm/system.h> @@ -116,37 +117,49 @@ static inline u_int pxa2xx_pcmcia_cmd_time(u_int mem_clk_10khz, static int pxa2xx_pcmcia_set_mcmem( int sock, int speed, int clock ) { - MCMEM(sock) = ((pxa2xx_mcxx_setup(speed, clock) + uint32_t val; + + val = ((pxa2xx_mcxx_setup(speed, clock) & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | ((pxa2xx_mcxx_asst(speed, clock) & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); + __raw_writel(val, MCMEM(sock)); + return 0; } static int pxa2xx_pcmcia_set_mcio( int sock, int speed, int clock ) { - MCIO(sock) = ((pxa2xx_mcxx_setup(speed, clock) + uint32_t val; + + val = ((pxa2xx_mcxx_setup(speed, clock) & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | ((pxa2xx_mcxx_asst(speed, clock) & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); + __raw_writel(val, MCIO(sock)); + return 0; } static int pxa2xx_pcmcia_set_mcatt( int sock, int speed, int clock ) { - MCATT(sock) = ((pxa2xx_mcxx_setup(speed, clock) + uint32_t val; + + val = ((pxa2xx_mcxx_setup(speed, clock) & MCXX_SETUP_MASK) << MCXX_SETUP_SHIFT) | ((pxa2xx_mcxx_asst(speed, clock) & MCXX_ASST_MASK) << MCXX_ASST_SHIFT) | ((pxa2xx_mcxx_hold(speed, clock) & MCXX_HOLD_MASK) << MCXX_HOLD_SHIFT); + __raw_writel(val, MCATT(sock)); + return 0; } @@ -166,8 +179,8 @@ static int pxa2xx_pcmcia_set_mcxx(struct soc_pcmcia_socket *skt, unsigned int cl static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt) { - unsigned int clk = get_memclk_frequency_10khz(); - return pxa2xx_pcmcia_set_mcxx(skt, clk); + unsigned long clk = clk_get_rate(skt->clk); + return pxa2xx_pcmcia_set_mcxx(skt, clk / 10000); } #ifdef CONFIG_CPU_FREQ @@ -205,19 +218,18 @@ pxa2xx_pcmcia_frequency_change(struct soc_pcmcia_socket *skt, static void pxa2xx_configure_sockets(struct device *dev) { struct pcmcia_low_level *ops = dev->platform_data; - /* * We have at least one socket, so set MECR:CIT * (Card Is There) */ - MECR |= MECR_CIT; + uint32_t mecr = MECR_CIT; /* Set MECR:NOS (Number Of Sockets) */ if ((ops->first + ops->nr) > 1 || machine_is_viper() || machine_is_arcom_zeus()) - MECR |= MECR_NOS; - else - MECR &= ~MECR_NOS; + mecr |= MECR_NOS; + + __raw_writel(mecr, MECR); } static const char *skt_names[] = { @@ -270,24 +282,41 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev) struct pcmcia_low_level *ops; struct skt_dev_info *sinfo; struct soc_pcmcia_socket *skt; + struct clk *clk; ops = (struct pcmcia_low_level *)dev->dev.platform_data; - if (!ops) + if (!ops) { + ret = -ENODEV; + goto err0; + } + + if (cpu_is_pxa320() && ops->nr > 1) { + dev_err(&dev->dev, "pxa320 supports only one pcmcia slot"); + ret = -EINVAL; + goto err0; + } + + clk = clk_get(&dev->dev, NULL); + if (!clk) return -ENODEV; pxa2xx_drv_pcmcia_ops(ops); sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL); - if (!sinfo) + if (!sinfo) { + clk_put(clk); return -ENOMEM; + } sinfo->nskt = ops->nr; + sinfo->clk = clk; /* Initialize processor specific parameters */ for (i = 0; i < ops->nr; i++) { skt = &sinfo->skt[i]; skt->nr = ops->first + i; + skt->clk = clk; skt->ops = ops; skt->socket.owner = ops->owner; skt->socket.dev.parent = &dev->dev; @@ -295,18 +324,26 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev) ret = pxa2xx_drv_pcmcia_add_one(skt); if (ret) - break; + goto err1; } if (ret) { while (--i >= 0) soc_pcmcia_remove_one(&sinfo->skt[i]); kfree(sinfo); + clk_put(clk); } else { pxa2xx_configure_sockets(&dev->dev); dev_set_drvdata(&dev->dev, sinfo); } + return 0; + +err1: + while (--i >= 0) + soc_pcmcia_remove_one(&sinfo->skt[i]); + kfree(sinfo); +err0: return ret; } @@ -320,6 +357,7 @@ static int pxa2xx_drv_pcmcia_remove(struct platform_device *dev) for (i = 0; i < sinfo->nskt; i++) soc_pcmcia_remove_one(&sinfo->skt[i]); + clk_put(sinfo->clk); kfree(sinfo); return 0; } diff --git a/drivers/pcmcia/pxa2xx_colibri.c b/drivers/pcmcia/pxa2xx_colibri.c new file mode 100644 index 000000000000..c3f72192af66 --- /dev/null +++ b/drivers/pcmcia/pxa2xx_colibri.c @@ -0,0 +1,229 @@ +/* + * linux/drivers/pcmcia/pxa2xx_colibri.c + * + * Driver for Toradex Colibri PXA270 CF socket + * + * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/platform_device.h> +#include <linux/delay.h> +#include <linux/gpio.h> + +#include <asm/mach-types.h> + +#include "soc_common.h" + +#define COLIBRI270_RESET_GPIO 53 +#define COLIBRI270_PPEN_GPIO 107 +#define COLIBRI270_BVD1_GPIO 83 +#define COLIBRI270_BVD2_GPIO 82 +#define COLIBRI270_DETECT_GPIO 84 +#define COLIBRI270_READY_GPIO 1 + +#define COLIBRI320_RESET_GPIO 77 +#define COLIBRI320_PPEN_GPIO 57 +#define COLIBRI320_BVD1_GPIO 53 +#define COLIBRI320_BVD2_GPIO 79 +#define COLIBRI320_DETECT_GPIO 81 +#define COLIBRI320_READY_GPIO 29 + +static struct { + int reset_gpio; + int ppen_gpio; + int bvd1_gpio; + int bvd2_gpio; + int detect_gpio; + int ready_gpio; +} colibri_pcmcia_gpio; + +static struct pcmcia_irqs colibri_irqs[] = { + { + .sock = 0, + .str = "PCMCIA CD" + }, +}; + +static int colibri_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + int ret; + + ret = gpio_request(colibri_pcmcia_gpio.detect_gpio, "DETECT"); + if (ret) + goto err1; + ret = gpio_direction_input(colibri_pcmcia_gpio.detect_gpio); + if (ret) + goto err2; + + ret = gpio_request(colibri_pcmcia_gpio.ready_gpio, "READY"); + if (ret) + goto err2; + ret = gpio_direction_input(colibri_pcmcia_gpio.ready_gpio); + if (ret) + goto err3; + + ret = gpio_request(colibri_pcmcia_gpio.bvd1_gpio, "BVD1"); + if (ret) + goto err3; + ret = gpio_direction_input(colibri_pcmcia_gpio.bvd1_gpio); + if (ret) + goto err4; + + ret = gpio_request(colibri_pcmcia_gpio.bvd2_gpio, "BVD2"); + if (ret) + goto err4; + ret = gpio_direction_input(colibri_pcmcia_gpio.bvd2_gpio); + if (ret) + goto err5; + + ret = gpio_request(colibri_pcmcia_gpio.ppen_gpio, "PPEN"); + if (ret) + goto err5; + ret = gpio_direction_output(colibri_pcmcia_gpio.ppen_gpio, 0); + if (ret) + goto err6; + + ret = gpio_request(colibri_pcmcia_gpio.reset_gpio, "RESET"); + if (ret) + goto err6; + ret = gpio_direction_output(colibri_pcmcia_gpio.reset_gpio, 1); + if (ret) + goto err7; + + colibri_irqs[0].irq = gpio_to_irq(colibri_pcmcia_gpio.detect_gpio); + skt->socket.pci_irq = gpio_to_irq(colibri_pcmcia_gpio.ready_gpio); + + return soc_pcmcia_request_irqs(skt, colibri_irqs, + ARRAY_SIZE(colibri_irqs)); + +err7: + gpio_free(colibri_pcmcia_gpio.detect_gpio); +err6: + gpio_free(colibri_pcmcia_gpio.ready_gpio); +err5: + gpio_free(colibri_pcmcia_gpio.bvd1_gpio); +err4: + gpio_free(colibri_pcmcia_gpio.bvd2_gpio); +err3: + gpio_free(colibri_pcmcia_gpio.reset_gpio); +err2: + gpio_free(colibri_pcmcia_gpio.ppen_gpio); +err1: + return ret; +} + +static void colibri_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + gpio_free(colibri_pcmcia_gpio.detect_gpio); + gpio_free(colibri_pcmcia_gpio.ready_gpio); + gpio_free(colibri_pcmcia_gpio.bvd1_gpio); + gpio_free(colibri_pcmcia_gpio.bvd2_gpio); + gpio_free(colibri_pcmcia_gpio.reset_gpio); + gpio_free(colibri_pcmcia_gpio.ppen_gpio); +} + +static void colibri_pcmcia_socket_state(struct soc_pcmcia_socket *skt, + struct pcmcia_state *state) +{ + + state->detect = !!gpio_get_value(colibri_pcmcia_gpio.detect_gpio); + state->ready = !!gpio_get_value(colibri_pcmcia_gpio.ready_gpio); + state->bvd1 = !!gpio_get_value(colibri_pcmcia_gpio.bvd1_gpio); + state->bvd2 = !!gpio_get_value(colibri_pcmcia_gpio.bvd2_gpio); + state->wrprot = 0; + state->vs_3v = 1; + state->vs_Xv = 0; +} + +static int +colibri_pcmcia_configure_socket(struct soc_pcmcia_socket *skt, + const socket_state_t *state) +{ + gpio_set_value(colibri_pcmcia_gpio.ppen_gpio, + !(state->Vcc == 33 && state->Vpp < 50)); + gpio_set_value(colibri_pcmcia_gpio.reset_gpio, state->flags & SS_RESET); + return 0; +} + +static void colibri_pcmcia_socket_init(struct soc_pcmcia_socket *skt) +{ +} + +static void colibri_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) +{ +} + +static struct pcmcia_low_level colibri_pcmcia_ops = { + .owner = THIS_MODULE, + + .first = 0, + .nr = 1, + + .hw_init = colibri_pcmcia_hw_init, + .hw_shutdown = colibri_pcmcia_hw_shutdown, + + .socket_state = colibri_pcmcia_socket_state, + .configure_socket = colibri_pcmcia_configure_socket, + + .socket_init = colibri_pcmcia_socket_init, + .socket_suspend = colibri_pcmcia_socket_suspend, +}; + +static struct platform_device *colibri_pcmcia_device; + +static int __init colibri_pcmcia_init(void) +{ + int ret; + + colibri_pcmcia_device = platform_device_alloc("pxa2xx-pcmcia", -1); + if (!colibri_pcmcia_device) + return -ENOMEM; + + /* Colibri PXA270 */ + if (machine_is_colibri()) { + colibri_pcmcia_gpio.reset_gpio = COLIBRI270_RESET_GPIO; + colibri_pcmcia_gpio.ppen_gpio = COLIBRI270_PPEN_GPIO; + colibri_pcmcia_gpio.bvd1_gpio = COLIBRI270_BVD1_GPIO; + colibri_pcmcia_gpio.bvd2_gpio = COLIBRI270_BVD2_GPIO; + colibri_pcmcia_gpio.detect_gpio = COLIBRI270_DETECT_GPIO; + colibri_pcmcia_gpio.ready_gpio = COLIBRI270_READY_GPIO; + /* Colibri PXA320 */ + } else if (machine_is_colibri320()) { + colibri_pcmcia_gpio.reset_gpio = COLIBRI320_RESET_GPIO; + colibri_pcmcia_gpio.ppen_gpio = COLIBRI320_PPEN_GPIO; + colibri_pcmcia_gpio.bvd1_gpio = COLIBRI320_BVD1_GPIO; + colibri_pcmcia_gpio.bvd2_gpio = COLIBRI320_BVD2_GPIO; + colibri_pcmcia_gpio.detect_gpio = COLIBRI320_DETECT_GPIO; + colibri_pcmcia_gpio.ready_gpio = COLIBRI320_READY_GPIO; + } + + ret = platform_device_add_data(colibri_pcmcia_device, + &colibri_pcmcia_ops, sizeof(colibri_pcmcia_ops)); + + if (!ret) + ret = platform_device_add(colibri_pcmcia_device); + + if (ret) + platform_device_put(colibri_pcmcia_device); + + return ret; +} + +static void __exit colibri_pcmcia_exit(void) +{ + platform_device_unregister(colibri_pcmcia_device); +} + +module_init(colibri_pcmcia_init); +module_exit(colibri_pcmcia_exit); + +MODULE_AUTHOR("Marek Vasut <marek.vasut@gmail.com>"); +MODULE_DESCRIPTION("PCMCIA support for Toradex Colibri PXA270/PXA320"); +MODULE_ALIAS("platform:pxa2xx-pcmcia"); +MODULE_LICENSE("GPL"); diff --git a/drivers/pcmcia/sa1100_generic.c b/drivers/pcmcia/sa1100_generic.c index 6b228590b3fd..fb9740d3e9a7 100644 --- a/drivers/pcmcia/sa1100_generic.c +++ b/drivers/pcmcia/sa1100_generic.c @@ -53,6 +53,9 @@ static int (*sa11x0_pcmcia_hw_init[])(struct device *dev) = { #if defined(CONFIG_SA1100_H3100) || defined(CONFIG_SA1100_H3600) pcmcia_h3600_init, #endif +#ifdef CONFIG_SA1100_NANOENGINE + pcmcia_nanoengine_init, +#endif #ifdef CONFIG_SA1100_SHANNON pcmcia_shannon_init, #endif diff --git a/drivers/pcmcia/sa1100_generic.h b/drivers/pcmcia/sa1100_generic.h index 794f96a35bba..adb08dbc723f 100644 --- a/drivers/pcmcia/sa1100_generic.h +++ b/drivers/pcmcia/sa1100_generic.h @@ -13,6 +13,7 @@ extern int pcmcia_freebird_init(struct device *); extern int pcmcia_gcplus_init(struct device *); extern int pcmcia_graphicsmaster_init(struct device *); extern int pcmcia_h3600_init(struct device *); +extern int pcmcia_nanoengine_init(struct device *); extern int pcmcia_pangolin_init(struct device *); extern int pcmcia_pfs168_init(struct device *); extern int pcmcia_shannon_init(struct device *); diff --git a/drivers/pcmcia/sa1100_nanoengine.c b/drivers/pcmcia/sa1100_nanoengine.c new file mode 100644 index 000000000000..3d2652e2f5ae --- /dev/null +++ b/drivers/pcmcia/sa1100_nanoengine.c @@ -0,0 +1,219 @@ +/* + * drivers/pcmcia/sa1100_nanoengine.c + * + * PCMCIA implementation routines for BSI nanoEngine. + * + * In order to have a fully functional pcmcia subsystem in a BSE nanoEngine + * board you should carefully read this: + * http://cambuca.ldhs.cetuc.puc-rio.br/nanoengine/ + * + * Copyright (C) 2010 Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> + * + * Based on original work for kernel 2.4 by + * Miguel Freitas <miguel@cpti.cetuc.puc-rio.br> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ +#include <linux/device.h> +#include <linux/errno.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/signal.h> + +#include <asm/mach-types.h> +#include <asm/irq.h> + +#include <mach/hardware.h> +#include <mach/nanoengine.h> + +#include "sa1100_generic.h" + +static struct pcmcia_irqs irqs_skt0[] = { + /* socket, IRQ, name */ + { 0, NANOENGINE_IRQ_GPIO_PC_CD0, "PC CD0" }, +}; + +static struct pcmcia_irqs irqs_skt1[] = { + /* socket, IRQ, name */ + { 1, NANOENGINE_IRQ_GPIO_PC_CD1, "PC CD1" }, +}; + +struct nanoengine_pins { + unsigned input_pins; + unsigned output_pins; + unsigned clear_outputs; + unsigned transition_pins; + unsigned pci_irq; + struct pcmcia_irqs *pcmcia_irqs; + unsigned pcmcia_irqs_size; +}; + +static struct nanoengine_pins nano_skts[] = { + { + .input_pins = GPIO_PC_READY0 | GPIO_PC_CD0, + .output_pins = GPIO_PC_RESET0, + .clear_outputs = GPIO_PC_RESET0, + .transition_pins = NANOENGINE_IRQ_GPIO_PC_CD0, + .pci_irq = NANOENGINE_IRQ_GPIO_PC_READY0, + .pcmcia_irqs = irqs_skt0, + .pcmcia_irqs_size = ARRAY_SIZE(irqs_skt0) + }, { + .input_pins = GPIO_PC_READY1 | GPIO_PC_CD1, + .output_pins = GPIO_PC_RESET1, + .clear_outputs = GPIO_PC_RESET1, + .transition_pins = NANOENGINE_IRQ_GPIO_PC_CD1, + .pci_irq = NANOENGINE_IRQ_GPIO_PC_READY1, + .pcmcia_irqs = irqs_skt1, + .pcmcia_irqs_size = ARRAY_SIZE(irqs_skt1) + } +}; + +unsigned num_nano_pcmcia_sockets = ARRAY_SIZE(nano_skts); + +static int nanoengine_pcmcia_hw_init(struct soc_pcmcia_socket *skt) +{ + unsigned i = skt->nr; + + if (i >= num_nano_pcmcia_sockets) + return -ENXIO; + + GPDR &= ~nano_skts[i].input_pins; + GPDR |= nano_skts[i].output_pins; + GPCR = nano_skts[i].clear_outputs; + set_irq_type(nano_skts[i].transition_pins, IRQ_TYPE_EDGE_BOTH); + skt->socket.pci_irq = nano_skts[i].pci_irq; + + return soc_pcmcia_request_irqs(skt, + nano_skts[i].pcmcia_irqs, nano_skts[i].pcmcia_irqs_size); +} + +/* + * Release all resources. + */ +static void nanoengine_pcmcia_hw_shutdown(struct soc_pcmcia_socket *skt) +{ + unsigned i = skt->nr; + + if (i >= num_nano_pcmcia_sockets) + return; + + soc_pcmcia_free_irqs(skt, + nano_skts[i].pcmcia_irqs, nano_skts[i].pcmcia_irqs_size); +} + +static int nanoengine_pcmcia_configure_socket( + struct soc_pcmcia_socket *skt, const socket_state_t *state) +{ + unsigned reset; + unsigned i = skt->nr; + + if (i >= num_nano_pcmcia_sockets) + return -ENXIO; + + switch (i) { + case 0: + reset = GPIO_PC_RESET0; + break; + case 1: + reset = GPIO_PC_RESET1; + break; + default: + return -ENXIO; + } + + if (state->flags & SS_RESET) + GPSR = reset; + else + GPCR = reset; + + return 0; +} + +static void nanoengine_pcmcia_socket_state( + struct soc_pcmcia_socket *skt, struct pcmcia_state *state) +{ + unsigned long levels = GPLR; + unsigned i = skt->nr; + + if (i >= num_nano_pcmcia_sockets) + return; + + memset(state, 0, sizeof(struct pcmcia_state)); + switch (i) { + case 0: + state->ready = (levels & GPIO_PC_READY0) ? 1 : 0; + state->detect = !(levels & GPIO_PC_CD0) ? 1 : 0; + break; + case 1: + state->ready = (levels & GPIO_PC_READY1) ? 1 : 0; + state->detect = !(levels & GPIO_PC_CD1) ? 1 : 0; + break; + default: + return; + } + state->bvd1 = 1; + state->bvd2 = 1; + state->wrprot = 0; /* Not available */ + state->vs_3v = 1; /* Can only apply 3.3V */ + state->vs_Xv = 0; +} + +/* + * Enable card status IRQs on (re-)initialisation. This can + * be called at initialisation, power management event, or + * pcmcia event. + */ +static void nanoengine_pcmcia_socket_init(struct soc_pcmcia_socket *skt) +{ + unsigned i = skt->nr; + + if (i >= num_nano_pcmcia_sockets) + return; + + soc_pcmcia_enable_irqs(skt, + nano_skts[i].pcmcia_irqs, nano_skts[i].pcmcia_irqs_size); +} + +/* + * Disable card status IRQs on suspend. + */ +static void nanoengine_pcmcia_socket_suspend(struct soc_pcmcia_socket *skt) +{ + unsigned i = skt->nr; + + if (i >= num_nano_pcmcia_sockets) + return; + + soc_pcmcia_disable_irqs(skt, + nano_skts[i].pcmcia_irqs, nano_skts[i].pcmcia_irqs_size); +} + +static struct pcmcia_low_level nanoengine_pcmcia_ops = { + .owner = THIS_MODULE, + + .hw_init = nanoengine_pcmcia_hw_init, + .hw_shutdown = nanoengine_pcmcia_hw_shutdown, + + .configure_socket = nanoengine_pcmcia_configure_socket, + .socket_state = nanoengine_pcmcia_socket_state, + .socket_init = nanoengine_pcmcia_socket_init, + .socket_suspend = nanoengine_pcmcia_socket_suspend, +}; + +int pcmcia_nanoengine_init(struct device *dev) +{ + int ret = -ENODEV; + + if (machine_is_nanoengine()) + ret = sa11xx_drv_pcmcia_probe( + dev, &nanoengine_pcmcia_ops, 0, 2); + + return ret; +} + diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c index 2fe8cb8e95cd..5a9a392eacdf 100644 --- a/drivers/pcmcia/soc_common.c +++ b/drivers/pcmcia/soc_common.c @@ -31,20 +31,20 @@ ======================================================================*/ -#include <linux/module.h> -#include <linux/moduleparam.h> +#include <linux/cpufreq.h> #include <linux/init.h> +#include <linux/interrupt.h> +#include <linux/io.h> +#include <linux/irq.h> #include <linux/kernel.h> -#include <linux/timer.h> #include <linux/mm.h> +#include <linux/module.h> +#include <linux/moduleparam.h> #include <linux/mutex.h> -#include <linux/interrupt.h> -#include <linux/irq.h> #include <linux/spinlock.h> -#include <linux/cpufreq.h> +#include <linux/timer.h> #include <mach/hardware.h> -#include <asm/io.h> #include <asm/system.h> #include "soc_common.h" @@ -74,7 +74,8 @@ EXPORT_SYMBOL(soc_pcmcia_debug); #endif -#define to_soc_pcmcia_socket(x) container_of(x, struct soc_pcmcia_socket, socket) +#define to_soc_pcmcia_socket(x) \ + container_of(x, struct soc_pcmcia_socket, socket) static unsigned short calc_speed(unsigned short *spds, int num, unsigned short dflt) @@ -91,11 +92,15 @@ calc_speed(unsigned short *spds, int num, unsigned short dflt) return speed; } -void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *skt, struct soc_pcmcia_timing *timing) +void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *skt, + struct soc_pcmcia_timing *timing) { - timing->io = calc_speed(skt->spd_io, MAX_IO_WIN, SOC_PCMCIA_IO_ACCESS); - timing->mem = calc_speed(skt->spd_mem, MAX_WIN, SOC_PCMCIA_3V_MEM_ACCESS); - timing->attr = calc_speed(skt->spd_attr, MAX_WIN, SOC_PCMCIA_3V_MEM_ACCESS); + timing->io = + calc_speed(skt->spd_io, MAX_IO_WIN, SOC_PCMCIA_IO_ACCESS); + timing->mem = + calc_speed(skt->spd_mem, MAX_WIN, SOC_PCMCIA_3V_MEM_ACCESS); + timing->attr = + calc_speed(skt->spd_attr, MAX_WIN, SOC_PCMCIA_3V_MEM_ACCESS); } EXPORT_SYMBOL(soc_common_pcmcia_get_timing); @@ -137,8 +142,8 @@ static unsigned int soc_common_pcmcia_skt_state(struct soc_pcmcia_socket *skt) * * Convert PCMCIA socket state to our socket configure structure. */ -static int -soc_common_pcmcia_config_skt(struct soc_pcmcia_socket *skt, socket_state_t *state) +static int soc_common_pcmcia_config_skt( + struct soc_pcmcia_socket *skt, socket_state_t *state) { int ret; @@ -150,7 +155,8 @@ soc_common_pcmcia_config_skt(struct soc_pcmcia_socket *skt, socket_state_t *stat */ if (skt->irq_state != 1 && state->io_irq) { skt->irq_state = 1; - set_irq_type(skt->socket.pci_irq, IRQ_TYPE_EDGE_FALLING); + set_irq_type(skt->socket.pci_irq, + IRQ_TYPE_EDGE_FALLING); } else if (skt->irq_state == 1 && state->io_irq == 0) { skt->irq_state = 0; set_irq_type(skt->socket.pci_irq, IRQ_TYPE_NONE); @@ -304,24 +310,24 @@ soc_common_pcmcia_get_status(struct pcmcia_socket *sock, unsigned int *status) * of power configuration, reset, &c. We also record the value of * `state' in order to regurgitate it to the PCMCIA core later. */ -static int -soc_common_pcmcia_set_socket(struct pcmcia_socket *sock, socket_state_t *state) +static int soc_common_pcmcia_set_socket( + struct pcmcia_socket *sock, socket_state_t *state) { struct soc_pcmcia_socket *skt = to_soc_pcmcia_socket(sock); - debug(skt, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n", - (state->csc_mask==0)?"<NONE> ":"", - (state->csc_mask&SS_DETECT)?"DETECT ":"", - (state->csc_mask&SS_READY)?"READY ":"", - (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"", - (state->csc_mask&SS_BATWARN)?"BATWARN ":"", - (state->csc_mask&SS_STSCHG)?"STSCHG ":"", - (state->flags==0)?"<NONE> ":"", - (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"", - (state->flags&SS_IOCARD)?"IOCARD ":"", - (state->flags&SS_RESET)?"RESET ":"", - (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"", - (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"", + debug(skt, 2, "mask: %s%s%s%s%s%s flags: %s%s%s%s%s%s Vcc %d Vpp %d irq %d\n", + (state->csc_mask == 0) ? "<NONE> " : "", + (state->csc_mask & SS_DETECT) ? "DETECT " : "", + (state->csc_mask & SS_READY) ? "READY " : "", + (state->csc_mask & SS_BATDEAD) ? "BATDEAD " : "", + (state->csc_mask & SS_BATWARN) ? "BATWARN " : "", + (state->csc_mask & SS_STSCHG) ? "STSCHG " : "", + (state->flags == 0) ? "<NONE> " : "", + (state->flags & SS_PWR_AUTO) ? "PWR_AUTO " : "", + (state->flags & SS_IOCARD) ? "IOCARD " : "", + (state->flags & SS_RESET) ? "RESET " : "", + (state->flags & SS_SPKR_ENA) ? "SPKR_ENA " : "", + (state->flags & SS_OUTPUT_ENA) ? "OUTPUT_ENA " : "", state->Vcc, state->Vpp, state->io_irq); return soc_common_pcmcia_config_skt(skt, state); @@ -336,8 +342,8 @@ soc_common_pcmcia_set_socket(struct pcmcia_socket *sock, socket_state_t *state) * * Returns: 0 on success, -1 on error */ -static int -soc_common_pcmcia_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *map) +static int soc_common_pcmcia_set_io_map( + struct pcmcia_socket *sock, struct pccard_io_map *map) { struct soc_pcmcia_socket *skt = to_soc_pcmcia_socket(sock); unsigned short speed = map->speed; @@ -346,14 +352,14 @@ soc_common_pcmcia_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *m map->map, map->speed, (unsigned long long)map->start, (unsigned long long)map->stop); debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n", - (map->flags==0)?"<NONE>":"", - (map->flags&MAP_ACTIVE)?"ACTIVE ":"", - (map->flags&MAP_16BIT)?"16BIT ":"", - (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"", - (map->flags&MAP_0WS)?"0WS ":"", - (map->flags&MAP_WRPROT)?"WRPROT ":"", - (map->flags&MAP_USE_WAIT)?"USE_WAIT ":"", - (map->flags&MAP_PREFETCH)?"PREFETCH ":""); + (map->flags == 0) ? "<NONE>" : "", + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", + (map->flags & MAP_16BIT) ? "16BIT " : "", + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", + (map->flags & MAP_0WS) ? "0WS " : "", + (map->flags & MAP_WRPROT) ? "WRPROT " : "", + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "", + (map->flags & MAP_PREFETCH) ? "PREFETCH " : ""); if (map->map >= MAX_IO_WIN) { printk(KERN_ERR "%s(): map (%d) out of range\n", __func__, @@ -390,8 +396,8 @@ soc_common_pcmcia_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *m * * Returns: 0 on success, -ERRNO on error */ -static int -soc_common_pcmcia_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map) +static int soc_common_pcmcia_set_mem_map( + struct pcmcia_socket *sock, struct pccard_mem_map *map) { struct soc_pcmcia_socket *skt = to_soc_pcmcia_socket(sock); struct resource *res; @@ -400,14 +406,14 @@ soc_common_pcmcia_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map debug(skt, 2, "map %u speed %u card_start %08x\n", map->map, map->speed, map->card_start); debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n", - (map->flags==0)?"<NONE>":"", - (map->flags&MAP_ACTIVE)?"ACTIVE ":"", - (map->flags&MAP_16BIT)?"16BIT ":"", - (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"", - (map->flags&MAP_0WS)?"0WS ":"", - (map->flags&MAP_WRPROT)?"WRPROT ":"", - (map->flags&MAP_ATTRIB)?"ATTRIB ":"", - (map->flags&MAP_USE_WAIT)?"USE_WAIT ":""); + (map->flags == 0) ? "<NONE>" : "", + (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", + (map->flags & MAP_16BIT) ? "16BIT " : "", + (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", + (map->flags & MAP_0WS) ? "0WS " : "", + (map->flags & MAP_WRPROT) ? "WRPROT " : "", + (map->flags & MAP_ATTRIB) ? "ATTRIB " : "", + (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : ""); if (map->map >= MAX_WIN) return -EINVAL; @@ -462,8 +468,8 @@ static struct bittbl conf_bits[] = { { SS_OUTPUT_ENA, "SS_OUTPUT_ENA" }, }; -static void -dump_bits(char **p, const char *prefix, unsigned int val, struct bittbl *bits, int sz) +static void dump_bits(char **p, const char *prefix, + unsigned int val, struct bittbl *bits, int sz) { char *b = *p; int i; @@ -481,13 +487,14 @@ dump_bits(char **p, const char *prefix, unsigned int val, struct bittbl *bits, i * * Returns: the number of characters added to the buffer */ -static ssize_t show_status(struct device *dev, struct device_attribute *attr, char *buf) +static ssize_t show_status( + struct device *dev, struct device_attribute *attr, char *buf) { struct soc_pcmcia_socket *skt = container_of(dev, struct soc_pcmcia_socket, socket.dev); char *p = buf; - p+=sprintf(p, "slot : %d\n", skt->nr); + p += sprintf(p, "slot : %d\n", skt->nr); dump_bits(&p, "status", skt->status, status_bits, ARRAY_SIZE(status_bits)); @@ -496,12 +503,12 @@ static ssize_t show_status(struct device *dev, struct device_attribute *attr, ch dump_bits(&p, "cs_flags", skt->cs_state.flags, conf_bits, ARRAY_SIZE(conf_bits)); - p+=sprintf(p, "Vcc : %d\n", skt->cs_state.Vcc); - p+=sprintf(p, "Vpp : %d\n", skt->cs_state.Vpp); - p+=sprintf(p, "IRQ : %d (%d)\n", skt->cs_state.io_irq, + p += sprintf(p, "Vcc : %d\n", skt->cs_state.Vcc); + p += sprintf(p, "Vpp : %d\n", skt->cs_state.Vpp); + p += sprintf(p, "IRQ : %d (%d)\n", skt->cs_state.io_irq, skt->socket.pci_irq); if (skt->ops->show_timing) - p+=skt->ops->show_timing(skt, p); + p += skt->ops->show_timing(skt, p); return p-buf; } @@ -594,7 +601,7 @@ soc_pcmcia_notifier(struct notifier_block *nb, unsigned long val, void *data) mutex_lock(&soc_pcmcia_sockets_lock); list_for_each_entry(skt, &soc_pcmcia_sockets, node) - if ( skt->ops->frequency_change ) + if (skt->ops->frequency_change) ret += skt->ops->frequency_change(skt, val, freqs); mutex_unlock(&soc_pcmcia_sockets_lock); @@ -620,7 +627,8 @@ fs_initcall(soc_pcmcia_cpufreq_register); static void soc_pcmcia_cpufreq_unregister(void) { - cpufreq_unregister_notifier(&soc_pcmcia_notifier_block, CPUFREQ_TRANSITION_NOTIFIER); + cpufreq_unregister_notifier(&soc_pcmcia_notifier_block, + CPUFREQ_TRANSITION_NOTIFIER); } module_exit(soc_pcmcia_cpufreq_unregister); diff --git a/drivers/pcmcia/soc_common.h b/drivers/pcmcia/soc_common.h index bbcd5385a221..9daa73615c8b 100644 --- a/drivers/pcmcia/soc_common.h +++ b/drivers/pcmcia/soc_common.h @@ -10,6 +10,7 @@ #define _ASM_ARCH_PCMCIA /* include the world */ +#include <linux/clk.h> #include <linux/cpufreq.h> #include <pcmcia/ss.h> #include <pcmcia/cistpl.h> @@ -29,6 +30,7 @@ struct soc_pcmcia_socket { * Info from low level handler */ unsigned int nr; + struct clk *clk; /* * Core PCMCIA state @@ -56,6 +58,7 @@ struct soc_pcmcia_socket { struct skt_dev_info { int nskt; + struct clk *clk; struct soc_pcmcia_socket skt[0]; }; diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index e4a44b641702..88ea52b8647a 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c @@ -39,10 +39,10 @@ #include <mach/regs-ost.h> #endif -#define RTC_DEF_DIVIDER 32768 - 1 +#define RTC_DEF_DIVIDER (32768 - 1) #define RTC_DEF_TRIM 0 -static unsigned long rtc_freq = 1024; +static const unsigned long RTC_FREQ = 1024; static unsigned long timer_freq; static struct rtc_time rtc_alarm; static DEFINE_SPINLOCK(sa1100_rtc_lock); @@ -61,7 +61,8 @@ static inline int rtc_periodic_alarm(struct rtc_time *tm) * Calculate the next alarm time given the requested alarm time mask * and the current time. */ -static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm) +static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, + struct rtc_time *alrm) { unsigned long next_time; unsigned long now_time; @@ -116,7 +117,23 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) rtsr = RTSR; /* clear interrupt sources */ RTSR = 0; - RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); + /* Fix for a nasty initialization problem the in SA11xx RTSR register. + * See also the comments in sa1100_rtc_probe(). */ + if (rtsr & (RTSR_ALE | RTSR_HZE)) { + /* This is the original code, before there was the if test + * above. This code does not clear interrupts that were not + * enabled. */ + RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); + } else { + /* For some reason, it is possible to enter this routine + * without interruptions enabled, it has been tested with + * several units (Bug in SA11xx chip?). + * + * This situation leads to an infinite "loop" of interrupt + * routine calling and as a result the processor seems to + * lock on its first call to open(). */ + RTSR = RTSR_AL | RTSR_HZ; + } /* clear alarm interrupt if it has occurred */ if (rtsr & RTSR_AL) @@ -139,8 +156,58 @@ static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } +static int sa1100_irq_set_freq(struct device *dev, int freq) +{ + if (freq < 1 || freq > timer_freq) { + return -EINVAL; + } else { + struct rtc_device *rtc = (struct rtc_device *)dev; + + rtc->irq_freq = freq; + + return 0; + } +} + static int rtc_timer1_count; +static int sa1100_irq_set_state(struct device *dev, int enabled) +{ + spin_lock_irq(&sa1100_rtc_lock); + if (enabled) { + struct rtc_device *rtc = (struct rtc_device *)dev; + + OSMR1 = timer_freq / rtc->irq_freq + OSCR; + OIER |= OIER_E1; + rtc_timer1_count = 1; + } else { + OIER &= ~OIER_E1; + } + spin_unlock_irq(&sa1100_rtc_lock); + + return 0; +} + +static inline int sa1100_timer1_retrigger(struct rtc_device *rtc) +{ + unsigned long diff; + unsigned long period = timer_freq / rtc->irq_freq; + + spin_lock_irq(&sa1100_rtc_lock); + + do { + OSMR1 += period; + diff = OSMR1 - OSCR; + /* If OSCR > OSMR1, diff is a very large number (unsigned + * math). This means we have a lost interrupt. */ + } while (diff > period); + OIER |= OIER_E1; + + spin_unlock_irq(&sa1100_rtc_lock); + + return 0; +} + static irqreturn_t timer1_interrupt(int irq, void *dev_id) { struct platform_device *pdev = to_platform_device(dev_id); @@ -158,7 +225,11 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id) rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF); if (rtc_timer1_count == 1) - rtc_timer1_count = (rtc_freq * ((1 << 30) / (timer_freq >> 2))); + rtc_timer1_count = + (rtc->irq_freq * ((1 << 30) / (timer_freq >> 2))); + + /* retrigger. */ + sa1100_timer1_retrigger(rtc); return IRQ_HANDLED; } @@ -166,8 +237,10 @@ static irqreturn_t timer1_interrupt(int irq, void *dev_id) static int sa1100_rtc_read_callback(struct device *dev, int data) { if (data & RTC_PF) { + struct rtc_device *rtc = (struct rtc_device *)dev; + /* interpolate missed periods and set match for the next */ - unsigned long period = timer_freq / rtc_freq; + unsigned long period = timer_freq / rtc->irq_freq; unsigned long oscr = OSCR; unsigned long osmr1 = OSMR1; unsigned long missed = (oscr - osmr1)/period; @@ -178,7 +251,7 @@ static int sa1100_rtc_read_callback(struct device *dev, int data) * Here we compare (match - OSCR) 8 instead of 0 -- * see comment in pxa_timer_interrupt() for explanation. */ - while( (signed long)((osmr1 = OSMR1) - OSCR) <= 8 ) { + while ((signed long)((osmr1 = OSMR1) - OSCR) <= 8) { data += 0x100; OSSR = OSSR_M1; /* clear match on timer 1 */ OSMR1 = osmr1 + period; @@ -190,25 +263,29 @@ static int sa1100_rtc_read_callback(struct device *dev, int data) static int sa1100_rtc_open(struct device *dev) { int ret; + struct rtc_device *rtc = (struct rtc_device *)dev; ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED, - "rtc 1Hz", dev); + "rtc 1Hz", dev); if (ret) { dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz); goto fail_ui; } ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED, - "rtc Alrm", dev); + "rtc Alrm", dev); if (ret) { dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm); goto fail_ai; } ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED, - "rtc timer", dev); + "rtc timer", dev); if (ret) { dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1); goto fail_pi; } + rtc->max_user_freq = RTC_FREQ; + sa1100_irq_set_freq(dev, RTC_FREQ); + return 0; fail_pi: @@ -236,7 +313,7 @@ static void sa1100_rtc_release(struct device *dev) static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) { - switch(cmd) { + switch (cmd) { case RTC_AIE_OFF: spin_lock_irq(&sa1100_rtc_lock); RTSR &= ~RTSR_ALE; @@ -257,25 +334,6 @@ static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, RTSR |= RTSR_HZE; spin_unlock_irq(&sa1100_rtc_lock); return 0; - case RTC_PIE_OFF: - spin_lock_irq(&sa1100_rtc_lock); - OIER &= ~OIER_E1; - spin_unlock_irq(&sa1100_rtc_lock); - return 0; - case RTC_PIE_ON: - spin_lock_irq(&sa1100_rtc_lock); - OSMR1 = timer_freq / rtc_freq + OSCR; - OIER |= OIER_E1; - rtc_timer1_count = 1; - spin_unlock_irq(&sa1100_rtc_lock); - return 0; - case RTC_IRQP_READ: - return put_user(rtc_freq, (unsigned long *)arg); - case RTC_IRQP_SET: - if (arg < 1 || arg > timer_freq) - return -EINVAL; - rtc_freq = arg; - return 0; } return -ENOIOCTLCMD; } @@ -327,12 +385,15 @@ static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) { + struct rtc_device *rtc = (struct rtc_device *)dev; + seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR); seq_printf(seq, "update_IRQ\t: %s\n", (RTSR & RTSR_HZE) ? "yes" : "no"); seq_printf(seq, "periodic_IRQ\t: %s\n", (OIER & OIER_E1) ? "yes" : "no"); - seq_printf(seq, "periodic_freq\t: %ld\n", rtc_freq); + seq_printf(seq, "periodic_freq\t: %d\n", rtc->irq_freq); + seq_printf(seq, "RTSR\t\t: 0x%08x\n", (u32)RTSR); return 0; } @@ -347,6 +408,8 @@ static const struct rtc_class_ops sa1100_rtc_ops = { .read_alarm = sa1100_rtc_read_alarm, .set_alarm = sa1100_rtc_set_alarm, .proc = sa1100_rtc_proc, + .irq_set_freq = sa1100_irq_set_freq, + .irq_set_state = sa1100_irq_set_state, }; static int sa1100_rtc_probe(struct platform_device *pdev) @@ -364,7 +427,8 @@ static int sa1100_rtc_probe(struct platform_device *pdev) */ if (RTTR == 0) { RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); - dev_warn(&pdev->dev, "warning: initializing default clock divider/trim value\n"); + dev_warn(&pdev->dev, "warning: " + "initializing default clock divider/trim value\n"); /* The current RTC value probably doesn't make sense either */ RCNR = 0; } @@ -372,13 +436,42 @@ static int sa1100_rtc_probe(struct platform_device *pdev) device_init_wakeup(&pdev->dev, 1); rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops, - THIS_MODULE); + THIS_MODULE); if (IS_ERR(rtc)) return PTR_ERR(rtc); platform_set_drvdata(pdev, rtc); + /* Set the irq_freq */ + /*TODO: Find out who is messing with this value after we initialize + * it here.*/ + rtc->irq_freq = RTC_FREQ; + + /* Fix for a nasty initialization problem the in SA11xx RTSR register. + * See also the comments in sa1100_rtc_interrupt(). + * + * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an + * interrupt pending, even though interrupts were never enabled. + * In this case, this bit it must be reset before enabling + * interruptions to avoid a nonexistent interrupt to occur. + * + * In principle, the same problem would apply to bit 0, although it has + * never been observed to happen. + * + * This issue is addressed both here and in sa1100_rtc_interrupt(). + * If the issue is not addressed here, in the times when the processor + * wakes up with the bit set there will be one spurious interrupt. + * + * The issue is also dealt with in sa1100_rtc_interrupt() to be on the + * safe side, once the condition that lead to this strange + * initialization is unknown and could in principle happen during + * normal processing. + * + * Notice that clearing bit 1 and 0 is accomplished by writting ONES to + * the corresponding bits in RTSR. */ + RTSR = RTSR_AL | RTSR_HZ; + return 0; } @@ -386,7 +479,7 @@ static int sa1100_rtc_remove(struct platform_device *pdev) { struct rtc_device *rtc = platform_get_drvdata(pdev); - if (rtc) + if (rtc) rtc_device_unregister(rtc); return 0; diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index 6ca7a44f29c2..e76d7d000128 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c @@ -7,6 +7,7 @@ * * Copyright 1999 ARM Limited * Copyright (C) 2000 Deep Blue Solutions Ltd. + * Copyright (C) 2010 ST-Ericsson SA * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -48,6 +49,9 @@ #include <linux/amba/serial.h> #include <linux/clk.h> #include <linux/slab.h> +#include <linux/dmaengine.h> +#include <linux/dma-mapping.h> +#include <linux/scatterlist.h> #include <asm/io.h> #include <asm/sizes.h> @@ -63,21 +67,6 @@ #define UART_DR_ERROR (UART011_DR_OE|UART011_DR_BE|UART011_DR_PE|UART011_DR_FE) #define UART_DUMMY_DR_RX (1 << 16) -/* - * We wrap our port structure around the generic uart_port. - */ -struct uart_amba_port { - struct uart_port port; - struct clk *clk; - unsigned int im; /* interrupt mask */ - unsigned int old_status; - unsigned int ifls; /* vendor-specific */ - unsigned int lcrh_tx; /* vendor-specific */ - unsigned int lcrh_rx; /* vendor-specific */ - bool oversampling; /* vendor-specific */ - bool autorts; -}; - /* There is by now at least one vendor with differing details, so handle it */ struct vendor_data { unsigned int ifls; @@ -85,6 +74,7 @@ struct vendor_data { unsigned int lcrh_tx; unsigned int lcrh_rx; bool oversampling; + bool dma_threshold; }; static struct vendor_data vendor_arm = { @@ -93,6 +83,7 @@ static struct vendor_data vendor_arm = { .lcrh_tx = UART011_LCRH, .lcrh_rx = UART011_LCRH, .oversampling = false, + .dma_threshold = false, }; static struct vendor_data vendor_st = { @@ -101,22 +92,535 @@ static struct vendor_data vendor_st = { .lcrh_tx = ST_UART011_LCRH_TX, .lcrh_rx = ST_UART011_LCRH_RX, .oversampling = true, + .dma_threshold = true, +}; + +/* Deals with DMA transactions */ +struct pl011_dmatx_data { + struct dma_chan *chan; + struct scatterlist sg; + char *buf; + bool queued; }; +/* + * We wrap our port structure around the generic uart_port. + */ +struct uart_amba_port { + struct uart_port port; + struct clk *clk; + const struct vendor_data *vendor; + unsigned int dmacr; /* dma control reg */ + unsigned int im; /* interrupt mask */ + unsigned int old_status; + unsigned int fifosize; /* vendor-specific */ + unsigned int lcrh_tx; /* vendor-specific */ + unsigned int lcrh_rx; /* vendor-specific */ + bool autorts; + char type[12]; +#ifdef CONFIG_DMA_ENGINE + /* DMA stuff */ + bool using_dma; + struct pl011_dmatx_data dmatx; +#endif +}; + +/* + * All the DMA operation mode stuff goes inside this ifdef. + * This assumes that you have a generic DMA device interface, + * no custom DMA interfaces are supported. + */ +#ifdef CONFIG_DMA_ENGINE + +#define PL011_DMA_BUFFER_SIZE PAGE_SIZE + +static void pl011_dma_probe_initcall(struct uart_amba_port *uap) +{ + /* DMA is the sole user of the platform data right now */ + struct amba_pl011_data *plat = uap->port.dev->platform_data; + struct dma_slave_config tx_conf = { + .dst_addr = uap->port.mapbase + UART01x_DR, + .dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE, + .direction = DMA_TO_DEVICE, + .dst_maxburst = uap->fifosize >> 1, + }; + struct dma_chan *chan; + dma_cap_mask_t mask; + + /* We need platform data */ + if (!plat || !plat->dma_filter) { + dev_info(uap->port.dev, "no DMA platform data\n"); + return; + } + + /* Try to acquire a generic DMA engine slave channel */ + dma_cap_zero(mask); + dma_cap_set(DMA_SLAVE, mask); + + chan = dma_request_channel(mask, plat->dma_filter, plat->dma_tx_param); + if (!chan) { + dev_err(uap->port.dev, "no TX DMA channel!\n"); + return; + } + + dmaengine_slave_config(chan, &tx_conf); + uap->dmatx.chan = chan; + + dev_info(uap->port.dev, "DMA channel TX %s\n", + dma_chan_name(uap->dmatx.chan)); +} + +#ifndef MODULE +/* + * Stack up the UARTs and let the above initcall be done at device + * initcall time, because the serial driver is called as an arch + * initcall, and at this time the DMA subsystem is not yet registered. + * At this point the driver will switch over to using DMA where desired. + */ +struct dma_uap { + struct list_head node; + struct uart_amba_port *uap; +}; + +static LIST_HEAD(pl011_dma_uarts); + +static int __init pl011_dma_initcall(void) +{ + struct list_head *node, *tmp; + + list_for_each_safe(node, tmp, &pl011_dma_uarts) { + struct dma_uap *dmau = list_entry(node, struct dma_uap, node); + pl011_dma_probe_initcall(dmau->uap); + list_del(node); + kfree(dmau); + } + return 0; +} + +device_initcall(pl011_dma_initcall); + +static void pl011_dma_probe(struct uart_amba_port *uap) +{ + struct dma_uap *dmau = kzalloc(sizeof(struct dma_uap), GFP_KERNEL); + if (dmau) { + dmau->uap = uap; + list_add_tail(&dmau->node, &pl011_dma_uarts); + } +} +#else +static void pl011_dma_probe(struct uart_amba_port *uap) +{ + pl011_dma_probe_initcall(uap); +} +#endif + +static void pl011_dma_remove(struct uart_amba_port *uap) +{ + /* TODO: remove the initcall if it has not yet executed */ + if (uap->dmatx.chan) + dma_release_channel(uap->dmatx.chan); +} + + +/* Forward declare this for the refill routine */ +static int pl011_dma_tx_refill(struct uart_amba_port *uap); + +/* + * The current DMA TX buffer has been sent. + * Try to queue up another DMA buffer. + */ +static void pl011_dma_tx_callback(void *data) +{ + struct uart_amba_port *uap = data; + struct pl011_dmatx_data *dmatx = &uap->dmatx; + unsigned long flags; + u16 dmacr; + + spin_lock_irqsave(&uap->port.lock, flags); + if (uap->dmatx.queued) + dma_unmap_sg(dmatx->chan->device->dev, &dmatx->sg, 1, + DMA_TO_DEVICE); + + dmacr = uap->dmacr; + uap->dmacr = dmacr & ~UART011_TXDMAE; + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + + /* + * If TX DMA was disabled, it means that we've stopped the DMA for + * some reason (eg, XOFF received, or we want to send an X-char.) + * + * Note: we need to be careful here of a potential race between DMA + * and the rest of the driver - if the driver disables TX DMA while + * a TX buffer completing, we must update the tx queued status to + * get further refills (hence we check dmacr). + */ + if (!(dmacr & UART011_TXDMAE) || uart_tx_stopped(&uap->port) || + uart_circ_empty(&uap->port.state->xmit)) { + uap->dmatx.queued = false; + spin_unlock_irqrestore(&uap->port.lock, flags); + return; + } + + if (pl011_dma_tx_refill(uap) <= 0) { + /* + * We didn't queue a DMA buffer for some reason, but we + * have data pending to be sent. Re-enable the TX IRQ. + */ + uap->im |= UART011_TXIM; + writew(uap->im, uap->port.membase + UART011_IMSC); + } + spin_unlock_irqrestore(&uap->port.lock, flags); +} + +/* + * Try to refill the TX DMA buffer. + * Locking: called with port lock held and IRQs disabled. + * Returns: + * 1 if we queued up a TX DMA buffer. + * 0 if we didn't want to handle this by DMA + * <0 on error + */ +static int pl011_dma_tx_refill(struct uart_amba_port *uap) +{ + struct pl011_dmatx_data *dmatx = &uap->dmatx; + struct dma_chan *chan = dmatx->chan; + struct dma_device *dma_dev = chan->device; + struct dma_async_tx_descriptor *desc; + struct circ_buf *xmit = &uap->port.state->xmit; + unsigned int count; + + /* + * Try to avoid the overhead involved in using DMA if the + * transaction fits in the first half of the FIFO, by using + * the standard interrupt handling. This ensures that we + * issue a uart_write_wakeup() at the appropriate time. + */ + count = uart_circ_chars_pending(xmit); + if (count < (uap->fifosize >> 1)) { + uap->dmatx.queued = false; + return 0; + } + + /* + * Bodge: don't send the last character by DMA, as this + * will prevent XON from notifying us to restart DMA. + */ + count -= 1; + + /* Else proceed to copy the TX chars to the DMA buffer and fire DMA */ + if (count > PL011_DMA_BUFFER_SIZE) + count = PL011_DMA_BUFFER_SIZE; + + if (xmit->tail < xmit->head) + memcpy(&dmatx->buf[0], &xmit->buf[xmit->tail], count); + else { + size_t first = UART_XMIT_SIZE - xmit->tail; + size_t second = xmit->head; + + memcpy(&dmatx->buf[0], &xmit->buf[xmit->tail], first); + if (second) + memcpy(&dmatx->buf[first], &xmit->buf[0], second); + } + + dmatx->sg.length = count; + + if (dma_map_sg(dma_dev->dev, &dmatx->sg, 1, DMA_TO_DEVICE) != 1) { + uap->dmatx.queued = false; + dev_dbg(uap->port.dev, "unable to map TX DMA\n"); + return -EBUSY; + } + + desc = dma_dev->device_prep_slave_sg(chan, &dmatx->sg, 1, DMA_TO_DEVICE, + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) { + dma_unmap_sg(dma_dev->dev, &dmatx->sg, 1, DMA_TO_DEVICE); + uap->dmatx.queued = false; + /* + * If DMA cannot be used right now, we complete this + * transaction via IRQ and let the TTY layer retry. + */ + dev_dbg(uap->port.dev, "TX DMA busy\n"); + return -EBUSY; + } + + /* Some data to go along to the callback */ + desc->callback = pl011_dma_tx_callback; + desc->callback_param = uap; + + /* All errors should happen at prepare time */ + dmaengine_submit(desc); + + /* Fire the DMA transaction */ + dma_dev->device_issue_pending(chan); + + uap->dmacr |= UART011_TXDMAE; + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + uap->dmatx.queued = true; + + /* + * Now we know that DMA will fire, so advance the ring buffer + * with the stuff we just dispatched. + */ + xmit->tail = (xmit->tail + count) & (UART_XMIT_SIZE - 1); + uap->port.icount.tx += count; + + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(&uap->port); + + return 1; +} + +/* + * We received a transmit interrupt without a pending X-char but with + * pending characters. + * Locking: called with port lock held and IRQs disabled. + * Returns: + * false if we want to use PIO to transmit + * true if we queued a DMA buffer + */ +static bool pl011_dma_tx_irq(struct uart_amba_port *uap) +{ + if (!uap->using_dma) + return false; + + /* + * If we already have a TX buffer queued, but received a + * TX interrupt, it will be because we've just sent an X-char. + * Ensure the TX DMA is enabled and the TX IRQ is disabled. + */ + if (uap->dmatx.queued) { + uap->dmacr |= UART011_TXDMAE; + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + uap->im &= ~UART011_TXIM; + writew(uap->im, uap->port.membase + UART011_IMSC); + return true; + } + + /* + * We don't have a TX buffer queued, so try to queue one. + * If we succesfully queued a buffer, mask the TX IRQ. + */ + if (pl011_dma_tx_refill(uap) > 0) { + uap->im &= ~UART011_TXIM; + writew(uap->im, uap->port.membase + UART011_IMSC); + return true; + } + return false; +} + +/* + * Stop the DMA transmit (eg, due to received XOFF). + * Locking: called with port lock held and IRQs disabled. + */ +static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) +{ + if (uap->dmatx.queued) { + uap->dmacr &= ~UART011_TXDMAE; + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + } +} + +/* + * Try to start a DMA transmit, or in the case of an XON/OFF + * character queued for send, try to get that character out ASAP. + * Locking: called with port lock held and IRQs disabled. + * Returns: + * false if we want the TX IRQ to be enabled + * true if we have a buffer queued + */ +static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) +{ + u16 dmacr; + + if (!uap->using_dma) + return false; + + if (!uap->port.x_char) { + /* no X-char, try to push chars out in DMA mode */ + bool ret = true; + + if (!uap->dmatx.queued) { + if (pl011_dma_tx_refill(uap) > 0) { + uap->im &= ~UART011_TXIM; + ret = true; + } else { + uap->im |= UART011_TXIM; + ret = false; + } + writew(uap->im, uap->port.membase + UART011_IMSC); + } else if (!(uap->dmacr & UART011_TXDMAE)) { + uap->dmacr |= UART011_TXDMAE; + writew(uap->dmacr, + uap->port.membase + UART011_DMACR); + } + return ret; + } + + /* + * We have an X-char to send. Disable DMA to prevent it loading + * the TX fifo, and then see if we can stuff it into the FIFO. + */ + dmacr = uap->dmacr; + uap->dmacr &= ~UART011_TXDMAE; + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + + if (readw(uap->port.membase + UART01x_FR) & UART01x_FR_TXFF) { + /* + * No space in the FIFO, so enable the transmit interrupt + * so we know when there is space. Note that once we've + * loaded the character, we should just re-enable DMA. + */ + return false; + } + + writew(uap->port.x_char, uap->port.membase + UART01x_DR); + uap->port.icount.tx++; + uap->port.x_char = 0; + + /* Success - restore the DMA state */ + uap->dmacr = dmacr; + writew(dmacr, uap->port.membase + UART011_DMACR); + + return true; +} + +/* + * Flush the transmit buffer. + * Locking: called with port lock held and IRQs disabled. + */ +static void pl011_dma_flush_buffer(struct uart_port *port) +{ + struct uart_amba_port *uap = (struct uart_amba_port *)port; + + if (!uap->using_dma) + return; + + /* Avoid deadlock with the DMA engine callback */ + spin_unlock(&uap->port.lock); + dmaengine_terminate_all(uap->dmatx.chan); + spin_lock(&uap->port.lock); + if (uap->dmatx.queued) { + dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, + DMA_TO_DEVICE); + uap->dmatx.queued = false; + uap->dmacr &= ~UART011_TXDMAE; + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + } +} + + +static void pl011_dma_startup(struct uart_amba_port *uap) +{ + if (!uap->dmatx.chan) + return; + + uap->dmatx.buf = kmalloc(PL011_DMA_BUFFER_SIZE, GFP_KERNEL); + if (!uap->dmatx.buf) { + dev_err(uap->port.dev, "no memory for DMA TX buffer\n"); + uap->port.fifosize = uap->fifosize; + return; + } + + sg_init_one(&uap->dmatx.sg, uap->dmatx.buf, PL011_DMA_BUFFER_SIZE); + + /* The DMA buffer is now the FIFO the TTY subsystem can use */ + uap->port.fifosize = PL011_DMA_BUFFER_SIZE; + uap->using_dma = true; + + /* Turn on DMA error (RX/TX will be enabled on demand) */ + uap->dmacr |= UART011_DMAONERR; + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + + /* + * ST Micro variants has some specific dma burst threshold + * compensation. Set this to 16 bytes, so burst will only + * be issued above/below 16 bytes. + */ + if (uap->vendor->dma_threshold) + writew(ST_UART011_DMAWM_RX_16 | ST_UART011_DMAWM_TX_16, + uap->port.membase + ST_UART011_DMAWM); +} + +static void pl011_dma_shutdown(struct uart_amba_port *uap) +{ + if (!uap->using_dma) + return; + + /* Disable RX and TX DMA */ + while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) + barrier(); + + spin_lock_irq(&uap->port.lock); + uap->dmacr &= ~(UART011_DMAONERR | UART011_RXDMAE | UART011_TXDMAE); + writew(uap->dmacr, uap->port.membase + UART011_DMACR); + spin_unlock_irq(&uap->port.lock); + + /* In theory, this should already be done by pl011_dma_flush_buffer */ + dmaengine_terminate_all(uap->dmatx.chan); + if (uap->dmatx.queued) { + dma_unmap_sg(uap->dmatx.chan->device->dev, &uap->dmatx.sg, 1, + DMA_TO_DEVICE); + uap->dmatx.queued = false; + } + + kfree(uap->dmatx.buf); + + uap->using_dma = false; +} + +#else +/* Blank functions if the DMA engine is not available */ +static inline void pl011_dma_probe(struct uart_amba_port *uap) +{ +} + +static inline void pl011_dma_remove(struct uart_amba_port *uap) +{ +} + +static inline void pl011_dma_startup(struct uart_amba_port *uap) +{ +} + +static inline void pl011_dma_shutdown(struct uart_amba_port *uap) +{ +} + +static inline bool pl011_dma_tx_irq(struct uart_amba_port *uap) +{ + return false; +} + +static inline void pl011_dma_tx_stop(struct uart_amba_port *uap) +{ +} + +static inline bool pl011_dma_tx_start(struct uart_amba_port *uap) +{ + return false; +} + +#define pl011_dma_flush_buffer NULL +#endif + + static void pl011_stop_tx(struct uart_port *port) { struct uart_amba_port *uap = (struct uart_amba_port *)port; uap->im &= ~UART011_TXIM; writew(uap->im, uap->port.membase + UART011_IMSC); + pl011_dma_tx_stop(uap); } static void pl011_start_tx(struct uart_port *port) { struct uart_amba_port *uap = (struct uart_amba_port *)port; - uap->im |= UART011_TXIM; - writew(uap->im, uap->port.membase + UART011_IMSC); + if (!pl011_dma_tx_start(uap)) { + uap->im |= UART011_TXIM; + writew(uap->im, uap->port.membase + UART011_IMSC); + } } static void pl011_stop_rx(struct uart_port *port) @@ -203,7 +707,11 @@ static void pl011_tx_chars(struct uart_amba_port *uap) return; } - count = uap->port.fifosize >> 1; + /* If we are using DMA mode, try to send some characters. */ + if (pl011_dma_tx_irq(uap)) + return; + + count = uap->fifosize >> 1; do { writew(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR); xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); @@ -246,10 +754,11 @@ static void pl011_modem_status(struct uart_amba_port *uap) static irqreturn_t pl011_int(int irq, void *dev_id) { struct uart_amba_port *uap = dev_id; + unsigned long flags; unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT; int handled = 0; - spin_lock(&uap->port.lock); + spin_lock_irqsave(&uap->port.lock, flags); status = readw(uap->port.membase + UART011_MIS); if (status) { @@ -274,7 +783,7 @@ static irqreturn_t pl011_int(int irq, void *dev_id) handled = 1; } - spin_unlock(&uap->port.lock); + spin_unlock_irqrestore(&uap->port.lock, flags); return IRQ_RETVAL(handled); } @@ -396,7 +905,7 @@ static int pl011_startup(struct uart_port *port) if (retval) goto clk_dis; - writew(uap->ifls, uap->port.membase + UART011_IFLS); + writew(uap->vendor->ifls, uap->port.membase + UART011_IFLS); /* * Provoke TX FIFO interrupt into asserting. @@ -423,11 +932,18 @@ static int pl011_startup(struct uart_port *port) cr = UART01x_CR_UARTEN | UART011_CR_RXE | UART011_CR_TXE; writew(cr, uap->port.membase + UART011_CR); + /* Clear pending error interrupts */ + writew(UART011_OEIS | UART011_BEIS | UART011_PEIS | UART011_FEIS, + uap->port.membase + UART011_ICR); + /* * initialise the old status of the modem signals */ uap->old_status = readw(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; + /* Startup DMA */ + pl011_dma_startup(uap); + /* * Finally, enable interrupts */ @@ -467,6 +983,8 @@ static void pl011_shutdown(struct uart_port *port) writew(0xffff, uap->port.membase + UART011_ICR); spin_unlock_irq(&uap->port.lock); + pl011_dma_shutdown(uap); + /* * Free the interrupt */ @@ -498,13 +1016,18 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, struct uart_amba_port *uap = (struct uart_amba_port *)port; unsigned int lcr_h, old_cr; unsigned long flags; - unsigned int baud, quot; + unsigned int baud, quot, clkdiv; + + if (uap->vendor->oversampling) + clkdiv = 8; + else + clkdiv = 16; /* * Ask the core to calculate the divisor for us. */ baud = uart_get_baud_rate(port, termios, old, 0, - port->uartclk/(uap->oversampling ? 8 : 16)); + port->uartclk / clkdiv); if (baud > port->uartclk/16) quot = DIV_ROUND_CLOSEST(port->uartclk * 8, baud); @@ -532,7 +1055,7 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, if (!(termios->c_cflag & PARODD)) lcr_h |= UART01x_LCRH_EPS; } - if (port->fifosize > 1) + if (uap->fifosize > 1) lcr_h |= UART01x_LCRH_FEN; spin_lock_irqsave(&port->lock, flags); @@ -588,8 +1111,8 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, uap->autorts = false; } - if (uap->oversampling) { - if (baud > port->uartclk/16) + if (uap->vendor->oversampling) { + if (baud > port->uartclk / 16) old_cr |= ST_UART011_CR_OVSFACT; else old_cr &= ~ST_UART011_CR_OVSFACT; @@ -622,7 +1145,8 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, static const char *pl011_type(struct uart_port *port) { - return port->type == PORT_AMBA ? "AMBA/PL011" : NULL; + struct uart_amba_port *uap = (struct uart_amba_port *)port; + return uap->port.type == PORT_AMBA ? uap->type : NULL; } /* @@ -679,6 +1203,7 @@ static struct uart_ops amba_pl011_pops = { .break_ctl = pl011_break_ctl, .startup = pl011_startup, .shutdown = pl011_shutdown, + .flush_buffer = pl011_dma_flush_buffer, .set_termios = pl011_set_termios, .type = pl011_type, .release_port = pl010_release_port, @@ -761,7 +1286,7 @@ pl011_console_get_options(struct uart_amba_port *uap, int *baud, *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); - if (uap->oversampling) { + if (uap->vendor->oversampling) { if (readw(uap->port.membase + UART011_CR) & ST_UART011_CR_OVSFACT) *baud *= 2; @@ -858,19 +1383,22 @@ static int pl011_probe(struct amba_device *dev, struct amba_id *id) goto unmap; } - uap->ifls = vendor->ifls; + uap->vendor = vendor; uap->lcrh_rx = vendor->lcrh_rx; uap->lcrh_tx = vendor->lcrh_tx; - uap->oversampling = vendor->oversampling; + uap->fifosize = vendor->fifosize; uap->port.dev = &dev->dev; uap->port.mapbase = dev->res.start; uap->port.membase = base; uap->port.iotype = UPIO_MEM; uap->port.irq = dev->irq[0]; - uap->port.fifosize = vendor->fifosize; + uap->port.fifosize = uap->fifosize; uap->port.ops = &amba_pl011_pops; uap->port.flags = UPF_BOOT_AUTOCONF; uap->port.line = i; + pl011_dma_probe(uap); + + snprintf(uap->type, sizeof(uap->type), "PL011 rev%u", amba_rev(dev)); amba_ports[i] = uap; @@ -879,6 +1407,7 @@ static int pl011_probe(struct amba_device *dev, struct amba_id *id) if (ret) { amba_set_drvdata(dev, NULL); amba_ports[i] = NULL; + pl011_dma_remove(uap); clk_put(uap->clk); unmap: iounmap(base); @@ -902,6 +1431,7 @@ static int pl011_remove(struct amba_device *dev) if (amba_ports[i] == uap) amba_ports[i] = NULL; + pl011_dma_remove(uap); iounmap(uap->port.membase); clk_put(uap->clk); kfree(uap); diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig index 67eb3770868f..5a7c8f1d76c6 100644 --- a/drivers/usb/Kconfig +++ b/drivers/usb/Kconfig @@ -41,6 +41,7 @@ config USB_ARCH_HAS_OHCI default y if MFD_TC6393XB default y if ARCH_W90X900 default y if ARCH_DAVINCI_DA8XX + default y if ARCH_CNS3XXX # PPC: default y if STB03xxx default y if PPC_MPC52xx @@ -66,6 +67,7 @@ config USB_ARCH_HAS_EHCI default y if ARCH_AT91SAM9G45 default y if ARCH_MXC default y if ARCH_OMAP3 + default y if ARCH_CNS3XXX default PCI # ARM SA1111 chips have a non-PCI based "OHCI-compatible" USB host interface. diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c index 5bdbfe619853..77b1eb577029 100644 --- a/drivers/usb/gadget/fsl_mxc_udc.c +++ b/drivers/usb/gadget/fsl_mxc_udc.c @@ -93,9 +93,9 @@ void fsl_udc_clk_finalize(struct platform_device *pdev) /* workaround ENGcm09152 for i.MX35 */ if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) { - v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR + + v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBPHYCTRL_OTGBASE_OFFSET)); - writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR + + writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR + USBPHYCTRL_OTGBASE_OFFSET)); } #endif diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 6f4f8e6a40c7..f8970d151d2a 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig @@ -147,6 +147,14 @@ config USB_W90X900_EHCI ---help--- Enables support for the W90X900 USB controller +config USB_CNS3XXX_EHCI + bool "Cavium CNS3XXX EHCI Module" + depends on USB_EHCI_HCD && ARCH_CNS3XXX + ---help--- + Enable support for the CNS3XXX SOC's on-chip EHCI controller. + It is needed for high-speed (480Mbit/sec) USB 2.0 device + support. + config USB_OXU210HP_HCD tristate "OXU210HP HCD support" depends on USB @@ -286,6 +294,13 @@ config USB_OHCI_HCD_SSB If unsure, say N. +config USB_CNS3XXX_OHCI + bool "Cavium CNS3XXX OHCI Module" + depends on USB_OHCI_HCD && ARCH_CNS3XXX + ---help--- + Enable support for the CNS3XXX SOC's on-chip OHCI controller. + It is needed for low-speed USB 1.0 device support. + config USB_OHCI_BIG_ENDIAN_DESC bool depends on USB_OHCI_HCD diff --git a/drivers/usb/host/ehci-cns3xxx.c b/drivers/usb/host/ehci-cns3xxx.c new file mode 100644 index 000000000000..708a05b5d258 --- /dev/null +++ b/drivers/usb/host/ehci-cns3xxx.c @@ -0,0 +1,171 @@ +/* + * Copyright 2008 Cavium Networks + * + * This file is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, Version 2, as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/atomic.h> +#include <mach/cns3xxx.h> +#include <mach/pm.h> + +static int cns3xxx_ehci_init(struct usb_hcd *hcd) +{ + struct ehci_hcd *ehci = hcd_to_ehci(hcd); + int retval; + + /* + * EHCI and OHCI share the same clock and power, + * resetting twice would cause the 1st controller been reset. + * Therefore only do power up at the first up device, and + * power down at the last down device. + * + * Set USB AHB INCR length to 16 + */ + if (atomic_inc_return(&usb_pwr_ref) == 1) { + cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB); + cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); + cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST); + __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)), + MISC_CHIP_CONFIG_REG); + } + + ehci->caps = hcd->regs; + ehci->regs = hcd->regs + + HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); + ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); + + hcd->has_tt = 0; + ehci_reset(ehci); + + retval = ehci_init(hcd); + if (retval) + return retval; + + ehci_port_power(ehci, 0); + + return retval; +} + +static const struct hc_driver cns3xxx_ehci_hc_driver = { + .description = hcd_name, + .product_desc = "CNS3XXX EHCI Host Controller", + .hcd_priv_size = sizeof(struct ehci_hcd), + .irq = ehci_irq, + .flags = HCD_MEMORY | HCD_USB2, + .reset = cns3xxx_ehci_init, + .start = ehci_run, + .stop = ehci_stop, + .shutdown = ehci_shutdown, + .urb_enqueue = ehci_urb_enqueue, + .urb_dequeue = ehci_urb_dequeue, + .endpoint_disable = ehci_endpoint_disable, + .endpoint_reset = ehci_endpoint_reset, + .get_frame_number = ehci_get_frame, + .hub_status_data = ehci_hub_status_data, + .hub_control = ehci_hub_control, +#ifdef CONFIG_PM + .bus_suspend = ehci_bus_suspend, + .bus_resume = ehci_bus_resume, +#endif + .relinquish_port = ehci_relinquish_port, + .port_handed_over = ehci_port_handed_over, + + .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, +}; + +static int cns3xxx_ehci_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct usb_hcd *hcd; + const struct hc_driver *driver = &cns3xxx_ehci_hc_driver; + struct resource *res; + int irq; + int retval; + + if (usb_disabled()) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + dev_err(dev, "Found HC with no IRQ.\n"); + return -ENODEV; + } + irq = res->start; + + hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); + if (!hcd) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(dev, "Found HC with no register addr.\n"); + retval = -ENODEV; + goto err1; + } + + hcd->rsrc_start = res->start; + hcd->rsrc_len = res->end - res->start + 1; + + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, + driver->description)) { + dev_dbg(dev, "controller already in use\n"); + retval = -EBUSY; + goto err1; + } + + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + if (hcd->regs == NULL) { + dev_dbg(dev, "error mapping memory\n"); + retval = -EFAULT; + goto err2; + } + + retval = usb_add_hcd(hcd, irq, IRQF_SHARED); + if (retval == 0) + return retval; + + iounmap(hcd->regs); +err2: + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); +err1: + usb_put_hcd(hcd); + + return retval; +} + +static int cns3xxx_ehci_remove(struct platform_device *pdev) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + + usb_remove_hcd(hcd); + iounmap(hcd->regs); + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + + /* + * EHCI and OHCI share the same clock and power, + * resetting twice would cause the 1st controller been reset. + * Therefore only do power up at the first up device, and + * power down at the last down device. + */ + if (atomic_dec_return(&usb_pwr_ref) == 0) + cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); + + usb_put_hcd(hcd); + + platform_set_drvdata(pdev, NULL); + + return 0; +} + +MODULE_ALIAS("platform:cns3xxx-ehci"); + +static struct platform_driver cns3xxx_ehci_driver = { + .probe = cns3xxx_ehci_probe, + .remove = cns3xxx_ehci_remove, + .driver = { + .name = "cns3xxx-ehci", + }, +}; diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index e9062806d4a2..d0c8f7c03e05 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -1216,6 +1216,11 @@ MODULE_LICENSE ("GPL"); #define PLATFORM_DRIVER ehci_octeon_driver #endif +#ifdef CONFIG_USB_CNS3XXX_EHCI +#include "ehci-cns3xxx.c" +#define PLATFORM_DRIVER cns3xxx_ehci_driver +#endif + #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \ !defined(XILINX_OF_PLATFORM_DRIVER) diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index bce85055019a..a22d2df769a9 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c @@ -28,7 +28,7 @@ #define ULPI_VIEWPORT_OFFSET 0x170 struct ehci_mxc_priv { - struct clk *usbclk, *ahbclk; + struct clk *usbclk, *ahbclk, *phy1clk; struct usb_hcd *hcd; }; @@ -168,17 +168,6 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev) goto err_ioremap; } - /* call platform specific init function */ - if (pdata->init) { - ret = pdata->init(pdev); - if (ret) { - dev_err(dev, "platform init failed\n"); - goto err_init; - } - /* platforms need some time to settle changed IO settings */ - mdelay(10); - } - /* enable clocks */ priv->usbclk = clk_get(dev, "usb"); if (IS_ERR(priv->usbclk)) { @@ -196,6 +185,28 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev) clk_enable(priv->ahbclk); } + /* "dr" device has its own clock */ + if (pdev->id == 0) { + priv->phy1clk = clk_get(dev, "usb_phy1"); + if (IS_ERR(priv->phy1clk)) { + ret = PTR_ERR(priv->phy1clk); + goto err_clk_phy; + } + clk_enable(priv->phy1clk); + } + + + /* call platform specific init function */ + if (pdata->init) { + ret = pdata->init(pdev); + if (ret) { + dev_err(dev, "platform init failed\n"); + goto err_init; + } + /* platforms need some time to settle changed IO settings */ + mdelay(10); + } + /* setup specific usb hw */ ret = mxc_initialize_usb_hw(pdev->id, pdata->flags); if (ret < 0) @@ -230,6 +241,11 @@ err_add: if (pdata && pdata->exit) pdata->exit(pdev); err_init: + if (priv->phy1clk) { + clk_disable(priv->phy1clk); + clk_put(priv->phy1clk); + } +err_clk_phy: if (priv->ahbclk) { clk_disable(priv->ahbclk); clk_put(priv->ahbclk); @@ -273,6 +289,10 @@ static int __exit ehci_mxc_drv_remove(struct platform_device *pdev) clk_disable(priv->ahbclk); clk_put(priv->ahbclk); } + if (priv->phy1clk) { + clk_disable(priv->phy1clk); + clk_put(priv->phy1clk); + } kfree(priv); diff --git a/drivers/usb/host/ohci-cns3xxx.c b/drivers/usb/host/ohci-cns3xxx.c new file mode 100644 index 000000000000..f05ef87e934c --- /dev/null +++ b/drivers/usb/host/ohci-cns3xxx.c @@ -0,0 +1,165 @@ +/* + * Copyright 2008 Cavium Networks + * + * This file is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License, Version 2, as + * published by the Free Software Foundation. + */ + +#include <linux/platform_device.h> +#include <linux/atomic.h> +#include <mach/cns3xxx.h> +#include <mach/pm.h> + +static int __devinit +cns3xxx_ohci_start(struct usb_hcd *hcd) +{ + struct ohci_hcd *ohci = hcd_to_ohci(hcd); + int ret; + + /* + * EHCI and OHCI share the same clock and power, + * resetting twice would cause the 1st controller been reset. + * Therefore only do power up at the first up device, and + * power down at the last down device. + * + * Set USB AHB INCR length to 16 + */ + if (atomic_inc_return(&usb_pwr_ref) == 1) { + cns3xxx_pwr_power_up(1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_PLL_USB); + cns3xxx_pwr_clk_en(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); + cns3xxx_pwr_soft_rst(1 << PM_SOFT_RST_REG_OFFST_USB_HOST); + __raw_writel((__raw_readl(MISC_CHIP_CONFIG_REG) | (0X2 << 24)), + MISC_CHIP_CONFIG_REG); + } + + ret = ohci_init(ohci); + if (ret < 0) + return ret; + + ohci->num_ports = 1; + + ret = ohci_run(ohci); + if (ret < 0) { + err("can't start %s", hcd->self.bus_name); + ohci_stop(hcd); + return ret; + } + return 0; +} + +static const struct hc_driver cns3xxx_ohci_hc_driver = { + .description = hcd_name, + .product_desc = "CNS3XXX OHCI Host controller", + .hcd_priv_size = sizeof(struct ohci_hcd), + .irq = ohci_irq, + .flags = HCD_USB11 | HCD_MEMORY, + .start = cns3xxx_ohci_start, + .stop = ohci_stop, + .shutdown = ohci_shutdown, + .urb_enqueue = ohci_urb_enqueue, + .urb_dequeue = ohci_urb_dequeue, + .endpoint_disable = ohci_endpoint_disable, + .get_frame_number = ohci_get_frame, + .hub_status_data = ohci_hub_status_data, + .hub_control = ohci_hub_control, +#ifdef CONFIG_PM + .bus_suspend = ohci_bus_suspend, + .bus_resume = ohci_bus_resume, +#endif + .start_port_reset = ohci_start_port_reset, +}; + +static int cns3xxx_ohci_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct usb_hcd *hcd; + const struct hc_driver *driver = &cns3xxx_ohci_hc_driver; + struct resource *res; + int irq; + int retval; + + if (usb_disabled()) + return -ENODEV; + + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); + if (!res) { + dev_err(dev, "Found HC with no IRQ.\n"); + return -ENODEV; + } + irq = res->start; + + hcd = usb_create_hcd(driver, dev, dev_name(dev)); + if (!hcd) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(dev, "Found HC with no register addr.\n"); + retval = -ENODEV; + goto err1; + } + hcd->rsrc_start = res->start; + hcd->rsrc_len = res->end - res->start + 1; + + if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, + driver->description)) { + dev_dbg(dev, "controller already in use\n"); + retval = -EBUSY; + goto err1; + } + + hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); + if (!hcd->regs) { + dev_dbg(dev, "error mapping memory\n"); + retval = -EFAULT; + goto err2; + } + + ohci_hcd_init(hcd_to_ohci(hcd)); + + retval = usb_add_hcd(hcd, irq, IRQF_SHARED); + if (retval == 0) + return retval; + + iounmap(hcd->regs); +err2: + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); +err1: + usb_put_hcd(hcd); + return retval; +} + +static int cns3xxx_ohci_remove(struct platform_device *pdev) +{ + struct usb_hcd *hcd = platform_get_drvdata(pdev); + + usb_remove_hcd(hcd); + iounmap(hcd->regs); + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); + + /* + * EHCI and OHCI share the same clock and power, + * resetting twice would cause the 1st controller been reset. + * Therefore only do power up at the first up device, and + * power down at the last down device. + */ + if (atomic_dec_return(&usb_pwr_ref) == 0) + cns3xxx_pwr_clk_dis(1 << PM_CLK_GATE_REG_OFFSET_USB_HOST); + + usb_put_hcd(hcd); + + platform_set_drvdata(pdev, NULL); + + return 0; +} + +MODULE_ALIAS("platform:cns3xxx-ohci"); + +static struct platform_driver ohci_hcd_cns3xxx_driver = { + .probe = cns3xxx_ohci_probe, + .remove = cns3xxx_ohci_remove, + .driver = { + .name = "cns3xxx-ohci", + }, +}; diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index 5179acb7aa2f..5cb6731ba443 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c @@ -1111,6 +1111,11 @@ MODULE_LICENSE ("GPL"); #define PLATFORM_DRIVER ohci_octeon_driver #endif +#ifdef CONFIG_USB_CNS3XXX_OHCI +#include "ohci-cns3xxx.c" +#define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver +#endif + #if !defined(PCI_DRIVER) && \ !defined(PLATFORM_DRIVER) && \ !defined(OMAP1_PLATFORM_DRIVER) && \ diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 9f36a29b10b4..55dc6fb6e909 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1932,6 +1932,16 @@ config FB_PXA_PARAMETERS <file:Documentation/fb/pxafb.txt> describes the available parameters. +config PXA3XX_GCU + tristate "PXA3xx 2D graphics accelerator driver" + depends on FB_PXA + help + Kernelspace driver for the 2D graphics controller unit (GCU) + found on PXA3xx processors. There is a counterpart driver in the + DirectFB suite, see http://www.directfb.org/ + + If you compile this as a module, it will be called pxa3xx_gcu. + config FB_MBX tristate "2700G LCD framebuffer support" depends on FB && ARCH_PXA diff --git a/drivers/video/Makefile b/drivers/video/Makefile index f9de51c39ad7..8c8fabdff9d0 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -101,6 +101,7 @@ obj-$(CONFIG_FB_CIRRUS) += cirrusfb.o obj-$(CONFIG_FB_ASILIANT) += asiliantfb.o obj-$(CONFIG_FB_PXA) += pxafb.o obj-$(CONFIG_FB_PXA168) += pxa168fb.o +obj-$(CONFIG_PXA3XX_GCU) += pxa3xx-gcu.o obj-$(CONFIG_FB_W100) += w100fb.o obj-$(CONFIG_FB_TMIO) += tmiofb.o obj-$(CONFIG_FB_AU1100) += au1100fb.o diff --git a/drivers/video/pxa3xx-gcu.c b/drivers/video/pxa3xx-gcu.c new file mode 100644 index 000000000000..b81168df253d --- /dev/null +++ b/drivers/video/pxa3xx-gcu.c @@ -0,0 +1,772 @@ +/* + * pxa3xx-gc.c - Linux kernel module for PXA3xx graphics controllers + * + * This driver needs a DirectFB counterpart in user space, communication + * is handled via mmap()ed memory areas and an ioctl. + * + * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> + * Copyright (c) 2009 Janine Kropp <nin@directfb.org> + * Copyright (c) 2009 Denis Oliver Kropp <dok@directfb.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * WARNING: This controller is attached to System Bus 2 of the PXA which + * needs its arbiter to be enabled explictly (CKENB & 1<<9). + * There is currently no way to do this from Linux, so you need to teach + * your bootloader for now. + */ + +#include <linux/module.h> +#include <linux/version.h> + +#include <linux/platform_device.h> +#include <linux/dma-mapping.h> +#include <linux/miscdevice.h> +#include <linux/interrupt.h> +#include <linux/spinlock.h> +#include <linux/uaccess.h> +#include <linux/ioctl.h> +#include <linux/delay.h> +#include <linux/sched.h> +#include <linux/slab.h> +#include <linux/clk.h> +#include <linux/fs.h> +#include <linux/io.h> + +#include "pxa3xx-gcu.h" + +#define DRV_NAME "pxa3xx-gcu" +#define MISCDEV_MINOR 197 + +#define REG_GCCR 0x00 +#define GCCR_SYNC_CLR (1 << 9) +#define GCCR_BP_RST (1 << 8) +#define GCCR_ABORT (1 << 6) +#define GCCR_STOP (1 << 4) + +#define REG_GCISCR 0x04 +#define REG_GCIECR 0x08 +#define REG_GCRBBR 0x20 +#define REG_GCRBLR 0x24 +#define REG_GCRBHR 0x28 +#define REG_GCRBTR 0x2C +#define REG_GCRBEXHR 0x30 + +#define IE_EOB (1 << 0) +#define IE_EEOB (1 << 5) +#define IE_ALL 0xff + +#define SHARED_SIZE PAGE_ALIGN(sizeof(struct pxa3xx_gcu_shared)) + +/* #define PXA3XX_GCU_DEBUG */ +/* #define PXA3XX_GCU_DEBUG_TIMER */ + +#ifdef PXA3XX_GCU_DEBUG +#define QDUMP(msg) \ + do { \ + QPRINT(priv, KERN_DEBUG, msg); \ + } while (0) +#else +#define QDUMP(msg) do {} while (0) +#endif + +#define QERROR(msg) \ + do { \ + QPRINT(priv, KERN_ERR, msg); \ + } while (0) + +struct pxa3xx_gcu_batch { + struct pxa3xx_gcu_batch *next; + u32 *ptr; + dma_addr_t phys; + unsigned long length; +}; + +struct pxa3xx_gcu_priv { + void __iomem *mmio_base; + struct clk *clk; + struct pxa3xx_gcu_shared *shared; + dma_addr_t shared_phys; + struct resource *resource_mem; + struct miscdevice misc_dev; + struct file_operations misc_fops; + wait_queue_head_t wait_idle; + wait_queue_head_t wait_free; + spinlock_t spinlock; + struct timeval base_time; + + struct pxa3xx_gcu_batch *free; + + struct pxa3xx_gcu_batch *ready; + struct pxa3xx_gcu_batch *ready_last; + struct pxa3xx_gcu_batch *running; +}; + +static inline unsigned long +gc_readl(struct pxa3xx_gcu_priv *priv, unsigned int off) +{ + return __raw_readl(priv->mmio_base + off); +} + +static inline void +gc_writel(struct pxa3xx_gcu_priv *priv, unsigned int off, unsigned long val) +{ + __raw_writel(val, priv->mmio_base + off); +} + +#define QPRINT(priv, level, msg) \ + do { \ + struct timeval tv; \ + struct pxa3xx_gcu_shared *shared = priv->shared; \ + u32 base = gc_readl(priv, REG_GCRBBR); \ + \ + do_gettimeofday(&tv); \ + \ + printk(level "%ld.%03ld.%03ld - %-17s: %-21s (%s, " \ + "STATUS " \ + "0x%02lx, B 0x%08lx [%ld], E %5ld, H %5ld, " \ + "T %5ld)\n", \ + tv.tv_sec - priv->base_time.tv_sec, \ + tv.tv_usec / 1000, tv.tv_usec % 1000, \ + __func__, msg, \ + shared->hw_running ? "running" : " idle", \ + gc_readl(priv, REG_GCISCR), \ + gc_readl(priv, REG_GCRBBR), \ + gc_readl(priv, REG_GCRBLR), \ + (gc_readl(priv, REG_GCRBEXHR) - base) / 4, \ + (gc_readl(priv, REG_GCRBHR) - base) / 4, \ + (gc_readl(priv, REG_GCRBTR) - base) / 4); \ + } while (0) + +static void +pxa3xx_gcu_reset(struct pxa3xx_gcu_priv *priv) +{ + QDUMP("RESET"); + + /* disable interrupts */ + gc_writel(priv, REG_GCIECR, 0); + + /* reset hardware */ + gc_writel(priv, REG_GCCR, GCCR_ABORT); + gc_writel(priv, REG_GCCR, 0); + + memset(priv->shared, 0, SHARED_SIZE); + priv->shared->buffer_phys = priv->shared_phys; + priv->shared->magic = PXA3XX_GCU_SHARED_MAGIC; + + do_gettimeofday(&priv->base_time); + + /* set up the ring buffer pointers */ + gc_writel(priv, REG_GCRBLR, 0); + gc_writel(priv, REG_GCRBBR, priv->shared_phys); + gc_writel(priv, REG_GCRBTR, priv->shared_phys); + + /* enable all IRQs except EOB */ + gc_writel(priv, REG_GCIECR, IE_ALL & ~IE_EOB); +} + +static void +dump_whole_state(struct pxa3xx_gcu_priv *priv) +{ + struct pxa3xx_gcu_shared *sh = priv->shared; + u32 base = gc_readl(priv, REG_GCRBBR); + + QDUMP("DUMP"); + + printk(KERN_DEBUG "== PXA3XX-GCU DUMP ==\n" + "%s, STATUS 0x%02lx, B 0x%08lx [%ld], E %5ld, H %5ld, T %5ld\n", + sh->hw_running ? "running" : "idle ", + gc_readl(priv, REG_GCISCR), + gc_readl(priv, REG_GCRBBR), + gc_readl(priv, REG_GCRBLR), + (gc_readl(priv, REG_GCRBEXHR) - base) / 4, + (gc_readl(priv, REG_GCRBHR) - base) / 4, + (gc_readl(priv, REG_GCRBTR) - base) / 4); +} + +static void +flush_running(struct pxa3xx_gcu_priv *priv) +{ + struct pxa3xx_gcu_batch *running = priv->running; + struct pxa3xx_gcu_batch *next; + + while (running) { + next = running->next; + running->next = priv->free; + priv->free = running; + running = next; + } + + priv->running = NULL; +} + +static void +run_ready(struct pxa3xx_gcu_priv *priv) +{ + unsigned int num = 0; + struct pxa3xx_gcu_shared *shared = priv->shared; + struct pxa3xx_gcu_batch *ready = priv->ready; + + QDUMP("Start"); + + BUG_ON(!ready); + + shared->buffer[num++] = 0x05000000; + + while (ready) { + shared->buffer[num++] = 0x00000001; + shared->buffer[num++] = ready->phys; + ready = ready->next; + } + + shared->buffer[num++] = 0x05000000; + priv->running = priv->ready; + priv->ready = priv->ready_last = NULL; + gc_writel(priv, REG_GCRBLR, 0); + shared->hw_running = 1; + + /* ring base address */ + gc_writel(priv, REG_GCRBBR, shared->buffer_phys); + + /* ring tail address */ + gc_writel(priv, REG_GCRBTR, shared->buffer_phys + num * 4); + + /* ring length */ + gc_writel(priv, REG_GCRBLR, ((num + 63) & ~63) * 4); +} + +static irqreturn_t +pxa3xx_gcu_handle_irq(int irq, void *ctx) +{ + struct pxa3xx_gcu_priv *priv = ctx; + struct pxa3xx_gcu_shared *shared = priv->shared; + u32 status = gc_readl(priv, REG_GCISCR) & IE_ALL; + + QDUMP("-Interrupt"); + + if (!status) + return IRQ_NONE; + + spin_lock(&priv->spinlock); + shared->num_interrupts++; + + if (status & IE_EEOB) { + QDUMP(" [EEOB]"); + + flush_running(priv); + wake_up_all(&priv->wait_free); + + if (priv->ready) { + run_ready(priv); + } else { + /* There is no more data prepared by the userspace. + * Set hw_running = 0 and wait for the next userspace + * kick-off */ + shared->num_idle++; + shared->hw_running = 0; + + QDUMP(" '-> Idle."); + + /* set ring buffer length to zero */ + gc_writel(priv, REG_GCRBLR, 0); + + wake_up_all(&priv->wait_idle); + } + + shared->num_done++; + } else { + QERROR(" [???]"); + dump_whole_state(priv); + } + + /* Clear the interrupt */ + gc_writel(priv, REG_GCISCR, status); + spin_unlock(&priv->spinlock); + + return IRQ_HANDLED; +} + +static int +pxa3xx_gcu_wait_idle(struct pxa3xx_gcu_priv *priv) +{ + int ret = 0; + + QDUMP("Waiting for idle..."); + + /* Does not need to be atomic. There's a lock in user space, + * but anyhow, this is just for statistics. */ + priv->shared->num_wait_idle++; + + while (priv->shared->hw_running) { + int num = priv->shared->num_interrupts; + u32 rbexhr = gc_readl(priv, REG_GCRBEXHR); + + ret = wait_event_interruptible_timeout(priv->wait_idle, + !priv->shared->hw_running, HZ*4); + + if (ret < 0) + break; + + if (ret > 0) + continue; + + if (gc_readl(priv, REG_GCRBEXHR) == rbexhr && + priv->shared->num_interrupts == num) { + QERROR("TIMEOUT"); + ret = -ETIMEDOUT; + break; + } + } + + QDUMP("done"); + + return ret; +} + +static int +pxa3xx_gcu_wait_free(struct pxa3xx_gcu_priv *priv) +{ + int ret = 0; + + QDUMP("Waiting for free..."); + + /* Does not need to be atomic. There's a lock in user space, + * but anyhow, this is just for statistics. */ + priv->shared->num_wait_free++; + + while (!priv->free) { + u32 rbexhr = gc_readl(priv, REG_GCRBEXHR); + + ret = wait_event_interruptible_timeout(priv->wait_free, + priv->free, HZ*4); + + if (ret < 0) + break; + + if (ret > 0) + continue; + + if (gc_readl(priv, REG_GCRBEXHR) == rbexhr) { + QERROR("TIMEOUT"); + ret = -ETIMEDOUT; + break; + } + } + + QDUMP("done"); + + return ret; +} + +/* Misc device layer */ + +static ssize_t +pxa3xx_gcu_misc_write(struct file *filp, const char *buff, + size_t count, loff_t *offp) +{ + int ret; + unsigned long flags; + struct pxa3xx_gcu_batch *buffer; + struct pxa3xx_gcu_priv *priv = + container_of(filp->f_op, struct pxa3xx_gcu_priv, misc_fops); + + int words = count / 4; + + /* Does not need to be atomic. There's a lock in user space, + * but anyhow, this is just for statistics. */ + priv->shared->num_writes++; + + priv->shared->num_words += words; + + /* Last word reserved for batch buffer end command */ + if (words >= PXA3XX_GCU_BATCH_WORDS) + return -E2BIG; + + /* Wait for a free buffer */ + if (!priv->free) { + ret = pxa3xx_gcu_wait_free(priv); + if (ret < 0) + return ret; + } + + /* + * Get buffer from free list + */ + spin_lock_irqsave(&priv->spinlock, flags); + + buffer = priv->free; + priv->free = buffer->next; + + spin_unlock_irqrestore(&priv->spinlock, flags); + + + /* Copy data from user into buffer */ + ret = copy_from_user(buffer->ptr, buff, words * 4); + if (ret) { + spin_lock_irqsave(&priv->spinlock, flags); + buffer->next = priv->free; + priv->free = buffer; + spin_unlock_irqrestore(&priv->spinlock, flags); + return ret; + } + + buffer->length = words; + + /* Append batch buffer end command */ + buffer->ptr[words] = 0x01000000; + + /* + * Add buffer to ready list + */ + spin_lock_irqsave(&priv->spinlock, flags); + + buffer->next = NULL; + + if (priv->ready) { + BUG_ON(priv->ready_last == NULL); + + priv->ready_last->next = buffer; + } else + priv->ready = buffer; + + priv->ready_last = buffer; + + if (!priv->shared->hw_running) + run_ready(priv); + + spin_unlock_irqrestore(&priv->spinlock, flags); + + return words * 4; +} + + +static long +pxa3xx_gcu_misc_ioctl(struct file *filp, unsigned int cmd, unsigned long arg) +{ + unsigned long flags; + struct pxa3xx_gcu_priv *priv = + container_of(filp->f_op, struct pxa3xx_gcu_priv, misc_fops); + + switch (cmd) { + case PXA3XX_GCU_IOCTL_RESET: + spin_lock_irqsave(&priv->spinlock, flags); + pxa3xx_gcu_reset(priv); + spin_unlock_irqrestore(&priv->spinlock, flags); + return 0; + + case PXA3XX_GCU_IOCTL_WAIT_IDLE: + return pxa3xx_gcu_wait_idle(priv); + } + + return -ENOSYS; +} + +static int +pxa3xx_gcu_misc_mmap(struct file *filp, struct vm_area_struct *vma) +{ + unsigned int size = vma->vm_end - vma->vm_start; + struct pxa3xx_gcu_priv *priv = + container_of(filp->f_op, struct pxa3xx_gcu_priv, misc_fops); + + switch (vma->vm_pgoff) { + case 0: + /* hand out the shared data area */ + if (size != SHARED_SIZE) + return -EINVAL; + + return dma_mmap_coherent(NULL, vma, + priv->shared, priv->shared_phys, size); + + case SHARED_SIZE >> PAGE_SHIFT: + /* hand out the MMIO base for direct register access + * from userspace */ + if (size != resource_size(priv->resource_mem)) + return -EINVAL; + + vma->vm_flags |= VM_IO; + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + return io_remap_pfn_range(vma, vma->vm_start, + priv->resource_mem->start >> PAGE_SHIFT, + size, vma->vm_page_prot); + } + + return -EINVAL; +} + + +#ifdef PXA3XX_GCU_DEBUG_TIMER +static struct timer_list pxa3xx_gcu_debug_timer; + +static void pxa3xx_gcu_debug_timedout(unsigned long ptr) +{ + struct pxa3xx_gcu_priv *priv = (struct pxa3xx_gcu_priv *) ptr; + + QERROR("Timer DUMP"); + + /* init the timer structure */ + init_timer(&pxa3xx_gcu_debug_timer); + pxa3xx_gcu_debug_timer.function = pxa3xx_gcu_debug_timedout; + pxa3xx_gcu_debug_timer.data = ptr; + pxa3xx_gcu_debug_timer.expires = jiffies + 5*HZ; /* one second */ + + add_timer(&pxa3xx_gcu_debug_timer); +} + +static void pxa3xx_gcu_init_debug_timer(void) +{ + pxa3xx_gcu_debug_timedout((unsigned long) &pxa3xx_gcu_debug_timer); +} +#else +static inline void pxa3xx_gcu_init_debug_timer(void) {} +#endif + +static int +add_buffer(struct platform_device *dev, + struct pxa3xx_gcu_priv *priv) +{ + struct pxa3xx_gcu_batch *buffer; + + buffer = kzalloc(sizeof(struct pxa3xx_gcu_batch), GFP_KERNEL); + if (!buffer) + return -ENOMEM; + + buffer->ptr = dma_alloc_coherent(&dev->dev, PXA3XX_GCU_BATCH_WORDS * 4, + &buffer->phys, GFP_KERNEL); + if (!buffer->ptr) { + kfree(buffer); + return -ENOMEM; + } + + buffer->next = priv->free; + + priv->free = buffer; + + return 0; +} + +static void +free_buffers(struct platform_device *dev, + struct pxa3xx_gcu_priv *priv) +{ + struct pxa3xx_gcu_batch *next, *buffer = priv->free; + + while (buffer) { + next = buffer->next; + + dma_free_coherent(&dev->dev, PXA3XX_GCU_BATCH_WORDS * 4, + buffer->ptr, buffer->phys); + + kfree(buffer); + + buffer = next; + } + + priv->free = NULL; +} + +static int __devinit +pxa3xx_gcu_probe(struct platform_device *dev) +{ + int i, ret, irq; + struct resource *r; + struct pxa3xx_gcu_priv *priv; + + priv = kzalloc(sizeof(struct pxa3xx_gcu_priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + for (i = 0; i < 8; i++) { + ret = add_buffer(dev, priv); + if (ret) { + dev_err(&dev->dev, "failed to allocate DMA memory\n"); + goto err_free_priv; + } + } + + init_waitqueue_head(&priv->wait_idle); + init_waitqueue_head(&priv->wait_free); + spin_lock_init(&priv->spinlock); + + /* we allocate the misc device structure as part of our own allocation, + * so we can get a pointer to our priv structure later on with + * container_of(). This isn't really necessary as we have a fixed minor + * number anyway, but this is to avoid statics. */ + + priv->misc_fops.owner = THIS_MODULE; + priv->misc_fops.write = pxa3xx_gcu_misc_write; + priv->misc_fops.unlocked_ioctl = pxa3xx_gcu_misc_ioctl; + priv->misc_fops.mmap = pxa3xx_gcu_misc_mmap; + + priv->misc_dev.minor = MISCDEV_MINOR, + priv->misc_dev.name = DRV_NAME, + priv->misc_dev.fops = &priv->misc_fops, + + /* register misc device */ + ret = misc_register(&priv->misc_dev); + if (ret < 0) { + dev_err(&dev->dev, "misc_register() for minor %d failed\n", + MISCDEV_MINOR); + goto err_free_priv; + } + + /* handle IO resources */ + r = platform_get_resource(dev, IORESOURCE_MEM, 0); + if (r == NULL) { + dev_err(&dev->dev, "no I/O memory resource defined\n"); + ret = -ENODEV; + goto err_misc_deregister; + } + + if (!request_mem_region(r->start, resource_size(r), dev->name)) { + dev_err(&dev->dev, "failed to request I/O memory\n"); + ret = -EBUSY; + goto err_misc_deregister; + } + + priv->mmio_base = ioremap_nocache(r->start, resource_size(r)); + if (!priv->mmio_base) { + dev_err(&dev->dev, "failed to map I/O memory\n"); + ret = -EBUSY; + goto err_free_mem_region; + } + + /* allocate dma memory */ + priv->shared = dma_alloc_coherent(&dev->dev, SHARED_SIZE, + &priv->shared_phys, GFP_KERNEL); + + if (!priv->shared) { + dev_err(&dev->dev, "failed to allocate DMA memory\n"); + ret = -ENOMEM; + goto err_free_io; + } + + /* enable the clock */ + priv->clk = clk_get(&dev->dev, NULL); + if (IS_ERR(priv->clk)) { + dev_err(&dev->dev, "failed to get clock\n"); + ret = -ENODEV; + goto err_free_dma; + } + + ret = clk_enable(priv->clk); + if (ret < 0) { + dev_err(&dev->dev, "failed to enable clock\n"); + goto err_put_clk; + } + + /* request the IRQ */ + irq = platform_get_irq(dev, 0); + if (irq < 0) { + dev_err(&dev->dev, "no IRQ defined\n"); + ret = -ENODEV; + goto err_put_clk; + } + + ret = request_irq(irq, pxa3xx_gcu_handle_irq, + IRQF_DISABLED, DRV_NAME, priv); + if (ret) { + dev_err(&dev->dev, "request_irq failed\n"); + ret = -EBUSY; + goto err_put_clk; + } + + platform_set_drvdata(dev, priv); + priv->resource_mem = r; + pxa3xx_gcu_reset(priv); + pxa3xx_gcu_init_debug_timer(); + + dev_info(&dev->dev, "registered @0x%p, DMA 0x%p (%d bytes), IRQ %d\n", + (void *) r->start, (void *) priv->shared_phys, + SHARED_SIZE, irq); + return 0; + +err_put_clk: + clk_disable(priv->clk); + clk_put(priv->clk); + +err_free_dma: + dma_free_coherent(&dev->dev, SHARED_SIZE, + priv->shared, priv->shared_phys); + +err_free_io: + iounmap(priv->mmio_base); + +err_free_mem_region: + release_mem_region(r->start, resource_size(r)); + +err_misc_deregister: + misc_deregister(&priv->misc_dev); + +err_free_priv: + platform_set_drvdata(dev, NULL); + free_buffers(dev, priv); + kfree(priv); + return ret; +} + +static int __devexit +pxa3xx_gcu_remove(struct platform_device *dev) +{ + struct pxa3xx_gcu_priv *priv = platform_get_drvdata(dev); + struct resource *r = priv->resource_mem; + + pxa3xx_gcu_wait_idle(priv); + + misc_deregister(&priv->misc_dev); + dma_free_coherent(&dev->dev, SHARED_SIZE, + priv->shared, priv->shared_phys); + iounmap(priv->mmio_base); + release_mem_region(r->start, resource_size(r)); + platform_set_drvdata(dev, NULL); + clk_disable(priv->clk); + free_buffers(dev, priv); + kfree(priv); + + return 0; +} + +static struct platform_driver pxa3xx_gcu_driver = { + .probe = pxa3xx_gcu_probe, + .remove = __devexit_p(pxa3xx_gcu_remove), + .driver = { + .owner = THIS_MODULE, + .name = DRV_NAME, + }, +}; + +static int __init +pxa3xx_gcu_init(void) +{ + return platform_driver_register(&pxa3xx_gcu_driver); +} + +static void __exit +pxa3xx_gcu_exit(void) +{ + platform_driver_unregister(&pxa3xx_gcu_driver); +} + +module_init(pxa3xx_gcu_init); +module_exit(pxa3xx_gcu_exit); + +MODULE_DESCRIPTION("PXA3xx graphics controller unit driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS_MISCDEV(MISCDEV_MINOR); +MODULE_AUTHOR("Janine Kropp <nin@directfb.org>, " + "Denis Oliver Kropp <dok@directfb.org>, " + "Daniel Mack <daniel@caiaq.de>"); diff --git a/drivers/video/pxa3xx-gcu.h b/drivers/video/pxa3xx-gcu.h new file mode 100644 index 000000000000..0428ed03dc49 --- /dev/null +++ b/drivers/video/pxa3xx-gcu.h @@ -0,0 +1,38 @@ +#ifndef __PXA3XX_GCU_H__ +#define __PXA3XX_GCU_H__ + +#include <linux/types.h> + +/* Number of 32bit words in display list (ring buffer). */ +#define PXA3XX_GCU_BUFFER_WORDS ((256 * 1024 - 256) / 4) + +/* To be increased when breaking the ABI */ +#define PXA3XX_GCU_SHARED_MAGIC 0x30000001 + +#define PXA3XX_GCU_BATCH_WORDS 8192 + +struct pxa3xx_gcu_shared { + u32 buffer[PXA3XX_GCU_BUFFER_WORDS]; + + bool hw_running; + + unsigned long buffer_phys; + + unsigned int num_words; + unsigned int num_writes; + unsigned int num_done; + unsigned int num_interrupts; + unsigned int num_wait_idle; + unsigned int num_wait_free; + unsigned int num_idle; + + u32 magic; +}; + +/* Initialization and synchronization. + * Hardware is started upon write(). */ +#define PXA3XX_GCU_IOCTL_RESET _IO('G', 0) +#define PXA3XX_GCU_IOCTL_WAIT_IDLE _IO('G', 2) + +#endif /* __PXA3XX_GCU_H__ */ + diff --git a/drivers/watchdog/imx2_wdt.c b/drivers/watchdog/imx2_wdt.c index 2ee7dac55a3c..86f7cac1026c 100644 --- a/drivers/watchdog/imx2_wdt.c +++ b/drivers/watchdog/imx2_wdt.c @@ -270,7 +270,7 @@ static int __init imx2_wdt_probe(struct platform_device *pdev) return -ENOMEM; } - imx2_wdt.clk = clk_get_sys("imx-wdt.0", NULL); + imx2_wdt.clk = clk_get(&pdev->dev, NULL); if (IS_ERR(imx2_wdt.clk)) { dev_err(&pdev->dev, "can't get Watchdog clock\n"); return PTR_ERR(imx2_wdt.clk); |