diff options
author | Ingo Molnar | 2008-08-14 12:19:59 +0200 |
---|---|---|
committer | Ingo Molnar | 2008-08-14 12:19:59 +0200 |
commit | 8d7ccaa545490cdffdfaff0842436a8dd85cf47b (patch) | |
tree | 8129b5907161bc6ae26deb3645ce1e280c5e1f51 /include/asm-arm/arch-s3c2410/regs-irq.h | |
parent | X86_SMP: tlb_XX.c declare smp_invalidate_interrupt before they get used (diff) | |
parent | Linux 2.6.27-rc3 (diff) | |
download | kernel-qcow2-linux-8d7ccaa545490cdffdfaff0842436a8dd85cf47b.tar.gz kernel-qcow2-linux-8d7ccaa545490cdffdfaff0842436a8dd85cf47b.tar.xz kernel-qcow2-linux-8d7ccaa545490cdffdfaff0842436a8dd85cf47b.zip |
Merge commit 'v2.6.27-rc3' into x86/prototypes
Conflicts:
include/asm-x86/dma-mapping.h
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'include/asm-arm/arch-s3c2410/regs-irq.h')
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-irq.h | 43 |
1 files changed, 0 insertions, 43 deletions
diff --git a/include/asm-arm/arch-s3c2410/regs-irq.h b/include/asm-arm/arch-s3c2410/regs-irq.h deleted file mode 100644 index 498184cb8adc..000000000000 --- a/include/asm-arm/arch-s3c2410/regs-irq.h +++ /dev/null @@ -1,43 +0,0 @@ -/* linux/include/asm-arm/arch-s3c2410/regs-irq.h - * - * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> - * http://www.simtec.co.uk/products/SWLINUX/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - -#ifndef ___ASM_ARCH_REGS_IRQ_H -#define ___ASM_ARCH_REGS_IRQ_H "$Id: irq.h,v 1.3 2003/03/25 21:29:06 ben Exp $" - -/* interrupt controller */ - -#define S3C2410_IRQREG(x) ((x) + S3C24XX_VA_IRQ) -#define S3C2410_EINTREG(x) ((x) + S3C24XX_VA_GPIO) -#define S3C24XX_EINTREG(x) ((x) + S3C24XX_VA_GPIO2) - -#define S3C2410_SRCPND S3C2410_IRQREG(0x000) -#define S3C2410_INTMOD S3C2410_IRQREG(0x004) -#define S3C2410_INTMSK S3C2410_IRQREG(0x008) -#define S3C2410_PRIORITY S3C2410_IRQREG(0x00C) -#define S3C2410_INTPND S3C2410_IRQREG(0x010) -#define S3C2410_INTOFFSET S3C2410_IRQREG(0x014) -#define S3C2410_SUBSRCPND S3C2410_IRQREG(0x018) -#define S3C2410_INTSUBMSK S3C2410_IRQREG(0x01C) - -/* mask: 0=enable, 1=disable - * 1 bit EINT, 4=EINT4, 23=EINT23 - * EINT0,1,2,3 are not handled here. -*/ - -#define S3C2410_EINTMASK S3C2410_EINTREG(0x0A4) -#define S3C2410_EINTPEND S3C2410_EINTREG(0X0A8) -#define S3C2412_EINTMASK S3C2410_EINTREG(0x0B4) -#define S3C2412_EINTPEND S3C2410_EINTREG(0X0B8) - -#define S3C24XX_EINTMASK S3C24XX_EINTREG(0x0A4) -#define S3C24XX_EINTPEND S3C24XX_EINTREG(0X0A8) - -#endif /* ___ASM_ARCH_REGS_IRQ_H */ |