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authorLinus Torvalds2007-07-12 23:17:12 +0200
committerLinus Torvalds2007-07-12 23:17:12 +0200
commit4aabab2181f20560948c2045ce1faaa9ac1507a8 (patch)
tree6556e126687c9cbb4b4a35a8ad8c327df30ac256 /include/asm-arm/ptrace.h
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jmo... (diff)
parentMerge branches 'at91', 'davinci', 'imx', 'iop', 'ixp', 'ks8695', 'misc', 'pxa... (diff)
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Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (50 commits) [ARM] sa1100: remove boot time RTC initialisation [ARM] sa1100: stop doing our own rtc management over suspend [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs [ARM] 4473/2: Take the HWCAP definitions out of the elf.h file [ARM] pxa: move platform devices to separate header file [ARM] pxa: move device registration into CPU-specific file [ARM] pxa: remove boot time RTC initialisation [ARM] pxa: stop doing our own rtc management over suspend [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code [ARM] 4450/1: pxa: add pxa25x_init_irq() and pxa27x_init_irq() [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs [ARM] 4438/1: PXA: remove #ifdef .. #endif from pxa_gpio_demux_handler() [ARM] 4437/1: PXA: move the GPIO IRQ initialization code to pxa_init_irq_gpio() [ARM] 4436/1: PXA: move low IRQ initialization code to pxa_init_irq_low() [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP [ARM] pxa: Fix PXA27x suspend type validation, remove pxa_pm_prepare() [ARM] pxa: move pm_ops structure into CPU specific files [ARM] pxa: introduce cpu_is_pxaXXX macros [ARM] pxa: remove MMC register defines from pxa-regs.h ...
Diffstat (limited to 'include/asm-arm/ptrace.h')
-rw-r--r--include/asm-arm/ptrace.h16
1 files changed, 13 insertions, 3 deletions
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
index ee3d93c281d8..7aaa206cb54e 100644
--- a/include/asm-arm/ptrace.h
+++ b/include/asm-arm/ptrace.h
@@ -10,6 +10,8 @@
#ifndef __ASM_ARM_PTRACE_H
#define __ASM_ARM_PTRACE_H
+#include <asm/hwcap.h>
+
#define PTRACE_GETREGS 12
#define PTRACE_SETREGS 13
#define PTRACE_GETFPREGS 14
@@ -45,6 +47,7 @@
#define PSR_T_BIT 0x00000020
#define PSR_F_BIT 0x00000040
#define PSR_I_BIT 0x00000080
+#define PSR_A_BIT 0x00000100
#define PSR_J_BIT 0x01000000
#define PSR_Q_BIT 0x08000000
#define PSR_V_BIT 0x10000000
@@ -103,6 +106,10 @@ struct pt_regs {
#define thumb_mode(regs) (0)
#endif
+#define isa_mode(regs) \
+ ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \
+ (((regs)->ARM_cpsr & PSR_T_BIT) >> 5))
+
#define processor_mode(regs) \
((regs)->ARM_cpsr & MODE_MASK)
@@ -117,14 +124,17 @@ struct pt_regs {
*/
static inline int valid_user_regs(struct pt_regs *regs)
{
- if (user_mode(regs) &&
- (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0)
+ if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) {
+ regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
return 1;
+ }
/*
* Force CPSR to something logical...
*/
- regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT;
+ regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;
+ if (!(elf_hwcap & HWCAP_26BIT))
+ regs->ARM_cpsr |= USR_MODE;
return 0;
}