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| author | Alexey Dobriyan | 2007-02-16 10:48:11 +0100 |
|---|---|---|
| committer | Dave Jones | 2007-02-20 20:23:43 +0100 |
| commit | b077ffb3b767c3efb44d00b998385a9cb127255c (patch) | |
| tree | 160369b5541142afedc20a97a9c89718550cf2a3 /include/asm-i386/msr.h | |
| parent | [CPUFREQ] Revert default on deprecated config X86_SPEEDSTEP_CENTRINO_ACPI (diff) | |
| download | kernel-qcow2-linux-b077ffb3b767c3efb44d00b998385a9cb127255c.tar.gz kernel-qcow2-linux-b077ffb3b767c3efb44d00b998385a9cb127255c.tar.xz kernel-qcow2-linux-b077ffb3b767c3efb44d00b998385a9cb127255c.zip | |
rdmsr_on_cpu, wrmsr_on_cpu
There was OpenVZ specific bug rendering some cpufreq drivers unusable on SMP.
In short, when cpufreq code thinks it confined itself to needed cpu by means
of set_cpus_allowed() to execute rdmsr, some "virtual cpu" feature can migrate
process to anywhere. This triggers bugons and does wrong things in general.
This got fixed by introducing rdmsr_on_cpu and wrmsr_on_cpu executing rdmsr
and wrmsr on given physical cpu by means of smp_call_function_single().
Dave Jones mentioned cpufreq might be not only user of rdmsr_on_cpu() and
wrmsr_on_cpu(), so I'm putting them into arch/{i386,x86_64}/lib/ .
Signed-off-by: Alexey Dobriyan <adobriyan@openvz.org>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Dave Jones <davej@redhat.com>
Diffstat (limited to 'include/asm-i386/msr.h')
| -rw-r--r-- | include/asm-i386/msr.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-i386/msr.h b/include/asm-i386/msr.h index 609a3899475c..3516a1fb38e0 100644 --- a/include/asm-i386/msr.h +++ b/include/asm-i386/msr.h @@ -83,6 +83,9 @@ static inline void wrmsrl (unsigned long msr, unsigned long long val) : "c" (counter)) #endif /* !CONFIG_PARAVIRT */ +void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h); +void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h); + /* symbolic names for some interesting MSRs */ /* Intel defined MSRs. */ #define MSR_IA32_P5_MC_ADDR 0 |