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| author | Siddha, Suresh B | 2005-10-30 23:59:30 +0100 |
|---|---|---|
| committer | Linus Torvalds | 2005-10-31 02:37:11 +0100 |
| commit | d16aafff2570abb557a5cb18c98027aabd602e22 (patch) | |
| tree | b2ce02548c87f162cbae7071b0195505d355bbb1 /include/asm-i386/pgtable.h | |
| parent | [PATCH] x86: initialise tss->io_bitmap_owner to something (diff) | |
| download | kernel-qcow2-linux-d16aafff2570abb557a5cb18c98027aabd602e22.tar.gz kernel-qcow2-linux-d16aafff2570abb557a5cb18c98027aabd602e22.tar.xz kernel-qcow2-linux-d16aafff2570abb557a5cb18c98027aabd602e22.zip | |
[PATCH] intel_cacheinfo: remove MAX_CACHE_LEAVES limit
Initial internal version of Venki's cpuid(4) deterministic cache parameter
identification patch used static arrays of size MAX_CACHE_LEAVES. Final patch
which made to the base used dynamic array allocation, with this
MAX_CACHE_LEAVES limit hunk still in place.
cpuid(4) already has a mechanism to find out the number of cache levels
implemented and there is no need for this hardcoded MAX_CACHE_LEAVES limit.
So remove the MAX_CACHE_LEAVES limit from the routine which calculates the
number of cache levels using cpuid(4)
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'include/asm-i386/pgtable.h')
0 files changed, 0 insertions, 0 deletions