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authorKirill Korotaev2007-10-17 18:04:33 +0200
committerThomas Gleixner2007-10-17 20:15:31 +0200
commitc1217a75ea102d4e69321f210fab60bc47b9a48e (patch)
treefffa575916b27bac17dfb751300ed2e1f9107f0c /include/asm-x86/system_32.h
parentx86: initialize 64bit registers for a.out executables (diff)
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x86: mark read_crX() asm code as volatile
Some gcc versions (I checked at least 4.1.1 from RHEL5 & 4.1.2 from gentoo) can generate incorrect code with read_crX()/write_crX() functions mix up, due to cached results of read_crX(). The small app for x8664 below compiled with -O2 demonstrates this (i686 does the same thing):
Diffstat (limited to 'include/asm-x86/system_32.h')
-rw-r--r--include/asm-x86/system_32.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-x86/system_32.h b/include/asm-x86/system_32.h
index d84e593b7dfc..1d6fb3afa533 100644
--- a/include/asm-x86/system_32.h
+++ b/include/asm-x86/system_32.h
@@ -142,7 +142,7 @@ static inline unsigned long native_read_cr4_safe(void)
{
unsigned long val;
/* This could fault if %cr4 does not exist */
- asm("1: movl %%cr4, %0 \n"
+ asm volatile("1: movl %%cr4, %0 \n"
"2: \n"
".section __ex_table,\"a\" \n"
".long 1b,2b \n"