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| author | Dmitry Osipenko | 2019-06-18 16:03:57 +0200 |
|---|---|---|
| committer | Daniel Lezcano | 2019-06-25 19:49:18 +0200 |
| commit | 0ef6b01d024c24fad307b277cfa4a2be7d25dc29 (patch) | |
| tree | 05aab71c90a634168a29b9b45cc04b9b8bb2b93c /include/clocksource | |
| parent | clocksource/drivers/tegra: Restore base address before cleanup (diff) | |
| download | kernel-qcow2-linux-0ef6b01d024c24fad307b277cfa4a2be7d25dc29.tar.gz kernel-qcow2-linux-0ef6b01d024c24fad307b277cfa4a2be7d25dc29.tar.xz kernel-qcow2-linux-0ef6b01d024c24fad307b277cfa4a2be7d25dc29.zip | |
clocksource/drivers/tegra: Cycles can't be 0
Tegra's timer uses n+1 scheme for the counter, i.e. timer will fire after
one tick if 0 is loaded. The minimum and maximum numbers of oneshot ticks
are defined by clockevents_config_and_register(min, max) invocation and
the min value is set to 1 tick. Hence "cycles" value can't ever be 0,
unless it's a bug in clocksource core.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Diffstat (limited to 'include/clocksource')
0 files changed, 0 insertions, 0 deletions