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authorInki Dae2014-08-13 09:38:23 +0200
committerInki Dae2014-09-19 17:56:08 +0200
commitd87f09abb31d2d52dda261b5128c39d3944afbab (patch)
tree77cdb61cb54844891470c2b933f12bb2e4b119d8 /include/drm/drm_mipi_dsi.h
parentdrm/exynos: dsi: fix exynos_dsi_set_pll() wrong return value (diff)
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drm/mipi-dsi: consider low power transmission
This patch adds a new flag, MIPI_DSI-MODE_LPM, to transmit data in low power. With this flag, msg.flags has MIPI_DSI_MSG_USE_LPM so that host driver of each SoC can clear or set relevant register bit for low power transmission. All host drivers shall support continuous clock behavior on the Clock Lane, and optionally may support non-continuous clock behavior. Both of them can transmit data in high speed of low power. With each clock behavior, non-continuous or continuous clock mode, host controller will transmit data in high speed by default so if peripheral wants to receive data in low power, the peripheral driver should set MIPI_DSI_MODE_LPM flag. Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'include/drm/drm_mipi_dsi.h')
-rw-r--r--include/drm/drm_mipi_dsi.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 2bb55b8b9031..8569dc5a1026 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -96,6 +96,8 @@ void mipi_dsi_host_unregister(struct mipi_dsi_host *host);
#define MIPI_DSI_MODE_EOT_PACKET BIT(9)
/* device supports non-continuous clock behavior (DSI spec 5.6.1) */
#define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10)
+/* transmit data in low power */
+#define MIPI_DSI_MODE_LPM BIT(11)
enum mipi_dsi_pixel_format {
MIPI_DSI_FMT_RGB888,