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| author | Dinh Nguyen | 2019-06-24 23:47:10 +0200 |
|---|---|---|
| committer | Stephen Boyd | 2019-06-25 23:36:56 +0200 |
| commit | 3b5015c4d834a70233c4419b07375254e4675e0b (patch) | |
| tree | 47aa187642650e7bd5b7eaa625f2317642e14efa /include/dt-bindings/clock | |
| parent | Linux 5.2-rc1 (diff) | |
| download | kernel-qcow2-linux-3b5015c4d834a70233c4419b07375254e4675e0b.tar.gz kernel-qcow2-linux-3b5015c4d834a70233c4419b07375254e4675e0b.tar.xz kernel-qcow2-linux-3b5015c4d834a70233c4419b07375254e4675e0b.zip | |
clk: socfpga: stratix10: add additional clocks needed for the NAND IP
The nand_clk is actually called the nand_x_clk and the parent is the
l4_mp_clk, not the l4_main_clk. The nand_clk is a child of the
nand_x_clk and has a fixed divider of 4. The same is true for the
nand_ecc_clk.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/stratix10-clock.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/stratix10-clock.h b/include/dt-bindings/clock/stratix10-clock.h index 0ac1c90a18bf..08b98e20b7cc 100644 --- a/include/dt-bindings/clock/stratix10-clock.h +++ b/include/dt-bindings/clock/stratix10-clock.h @@ -79,6 +79,8 @@ #define STRATIX10_USB_CLK 59 #define STRATIX10_SPI_M_CLK 60 #define STRATIX10_NAND_CLK 61 -#define STRATIX10_NUM_CLKS 62 +#define STRATIX10_NAND_X_CLK 62 +#define STRATIX10_NAND_ECC_CLK 63 +#define STRATIX10_NUM_CLKS 64 #endif /* __STRATIX10_CLOCK_H */ |