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| author | Ryder Lee | 2018-03-06 10:09:26 +0100 |
|---|---|---|
| committer | Stephen Boyd | 2018-03-19 21:40:57 +0100 |
| commit | 936ceb12c5f72cd087149e3cf01347969a472801 (patch) | |
| tree | 25255cf397c5ceef3f7ad9765e7d73efd263d61d /include/dt-bindings/clock | |
| parent | clk: mediatek: fix PWM clock source by adding a fixed-factor clock (diff) | |
| download | kernel-qcow2-linux-936ceb12c5f72cd087149e3cf01347969a472801.tar.gz kernel-qcow2-linux-936ceb12c5f72cd087149e3cf01347969a472801.tar.xz kernel-qcow2-linux-936ceb12c5f72cd087149e3cf01347969a472801.zip | |
clk: mediatek: update missing clock data for MT7622 audsys
Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/mt7622-clk.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/mt7622-clk.h b/include/dt-bindings/clock/mt7622-clk.h index 3e514ed51d15..e9d77f0e8bce 100644 --- a/include/dt-bindings/clock/mt7622-clk.h +++ b/include/dt-bindings/clock/mt7622-clk.h @@ -235,7 +235,8 @@ #define CLK_AUDIO_MEM_ASRC3 43 #define CLK_AUDIO_MEM_ASRC4 44 #define CLK_AUDIO_MEM_ASRC5 45 -#define CLK_AUDIO_NR_CLK 46 +#define CLK_AUDIO_AFE_CONN 46 +#define CLK_AUDIO_NR_CLK 47 /* SSUSBSYS */ |