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authorVivek Gautam2014-11-21 14:35:51 +0100
committerSylwester Nawrocki2014-12-23 12:02:14 +0100
commit83f191a7cdf5286a8f3745e847f50c29fa349da9 (patch)
tree4e27f9a33d8b5e995f205a3b53e10e1d6638e2a6 /include/dt-bindings/pwm
parentclk: samsung: exynos7: Add clocks for MSCL block (diff)
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clk: samsung: exynos7: Add required clock tree for USB
Adding required gate clocks for USB3.0 DRD controller present on Exynos7. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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