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authorJiancheng Xue2017-06-21 11:00:41 +0200
committerStephen Boyd2017-06-21 19:46:45 +0200
commit0d84659619696b42417c0d6c2eb7661a3ce254c0 (patch)
tree2b222234bb034c6f12daf27ad13538adc820d37e /include/dt-bindings
parentclk: Add Gemini SoC clock controller (diff)
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clk: hisilicon: add usb2 clocks for hi3798cv200 SoC
Add usb2 clocks for hi3798cv200 SoC. Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com> Reviewed-by: Daniel Thompson <daniel.thompson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/histb-clock.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/histb-clock.h b/include/dt-bindings/clock/histb-clock.h
index 181c0f070f7c..067f5e501b0c 100644
--- a/include/dt-bindings/clock/histb-clock.h
+++ b/include/dt-bindings/clock/histb-clock.h
@@ -53,7 +53,14 @@
#define HISTB_ETH1_MAC_CLK 31
#define HISTB_ETH1_MACIF_CLK 32
#define HISTB_COMBPHY1_CLK 33
-
+#define HISTB_USB2_BUS_CLK 34
+#define HISTB_USB2_PHY_CLK 35
+#define HISTB_USB2_UTMI_CLK 36
+#define HISTB_USB2_12M_CLK 37
+#define HISTB_USB2_48M_CLK 38
+#define HISTB_USB2_OTG_UTMI_CLK 39
+#define HISTB_USB2_PHY1_REF_CLK 40
+#define HISTB_USB2_PHY2_REF_CLK 41
/* clocks provided by mcu CRG */
#define HISTB_MCE_CLK 1