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| author | Bjorn Andersson | 2019-05-09 00:39:22 +0200 |
|---|---|---|
| committer | Stephen Boyd | 2019-06-07 23:30:33 +0200 |
| commit | e5bbbff5b7d7e76ccfe922a014ba628c558eff2f (patch) | |
| tree | 7a26bce0924e09914296caf9e636efa0da46b513 /include/dt-bindings | |
| parent | Linux 5.2-rc1 (diff) | |
| download | kernel-qcow2-linux-e5bbbff5b7d7e76ccfe922a014ba628c558eff2f.tar.gz kernel-qcow2-linux-e5bbbff5b7d7e76ccfe922a014ba628c558eff2f.tar.xz kernel-qcow2-linux-e5bbbff5b7d7e76ccfe922a014ba628c558eff2f.zip | |
clk: gcc-qcs404: Add PCIe resets
Enabling PCIe requires several of the PCIe related resets from GCC, so
add them all.
Reviewed-by: Niklas Cassel <niklas.cassel@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/qcom,gcc-qcs404.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/qcom,gcc-qcs404.h b/include/dt-bindings/clock/qcom,gcc-qcs404.h index 454b3f43f538..2cd62c98561f 100644 --- a/include/dt-bindings/clock/qcom,gcc-qcs404.h +++ b/include/dt-bindings/clock/qcom,gcc-qcs404.h @@ -166,5 +166,12 @@ #define GCC_PCIEPHY_0_PHY_BCR 12 #define GCC_EMAC_BCR 13 #define GCC_CDSP_RESTART 14 +#define GCC_PCIE_0_AXI_MASTER_STICKY_ARES 15 +#define GCC_PCIE_0_AHB_ARES 16 +#define GCC_PCIE_0_AXI_SLAVE_ARES 17 +#define GCC_PCIE_0_AXI_MASTER_ARES 18 +#define GCC_PCIE_0_CORE_STICKY_ARES 19 +#define GCC_PCIE_0_SLEEP_ARES 20 +#define GCC_PCIE_0_PIPE_ARES 21 #endif |