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| author | A.s. Dong | 2018-11-14 14:01:39 +0100 |
|---|---|---|
| committer | Stephen Boyd | 2018-12-03 20:31:24 +0100 |
| commit | e983da27f70e8d29f4ae7262d52e4d07129498f3 (patch) | |
| tree | 595b5d52cc4c85ac86e31c70d47a4f64b51c5944 /include/linux/clk-provider.h | |
| parent | clk: imx: add gatable clock divider support (diff) | |
| download | kernel-qcow2-linux-e983da27f70e8d29f4ae7262d52e4d07129498f3.tar.gz kernel-qcow2-linux-e983da27f70e8d29f4ae7262d52e4d07129498f3.tar.xz kernel-qcow2-linux-e983da27f70e8d29f4ae7262d52e4d07129498f3.zip | |
clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support
Adding CLK_FRAC_DIVIDER_ZERO_BASED flag to indicate the numerator and
denominator value in register are start from 0.
This can be used to support frac dividers like below:
Divider output clock = Divider input clock x [(frac +1) / (div +1)]
where frac/div in register is:
000b - Divide by 1.
001b - Divide by 2.
010b - Divide by 3.
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'include/linux/clk-provider.h')
| -rw-r--r-- | include/linux/clk-provider.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 60c51871b04b..fa0bad94f26b 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -601,6 +601,12 @@ void clk_hw_unregister_fixed_factor(struct clk_hw *hw); * @lock: register lock * * Clock with adjustable fractional divider affecting its output frequency. + * + * Flags: + * CLK_FRAC_DIVIDER_ZERO_BASED - by default the numerator and denominator + * is the value read from the register. If CLK_FRAC_DIVIDER_ZERO_BASED + * is set then the numerator and denominator are both the value read + * plus one. */ struct clk_fractional_divider { struct clk_hw hw; @@ -620,6 +626,8 @@ struct clk_fractional_divider { #define to_clk_fd(_hw) container_of(_hw, struct clk_fractional_divider, hw) +#define CLK_FRAC_DIVIDER_ZERO_BASED BIT(0) + extern const struct clk_ops clk_fractional_divider_ops; struct clk *clk_register_fractional_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, |