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| author | Marc Zyngier | 2017-06-09 13:49:36 +0200 |
|---|---|---|
| committer | Marc Zyngier | 2017-06-15 10:45:00 +0200 |
| commit | 132a324ab62fe4fb8d6dcc2ab4eddb0e93b69afe (patch) | |
| tree | 40e984fdf6d974fd8a7549b005897f5f134bd420 /include/linux/irqchip/arm-gic-v3.h | |
| parent | KVM: arm64: vgic-v3: Add ICV_IGRPEN1_EL1 handler (diff) | |
| download | kernel-qcow2-linux-132a324ab62fe4fb8d6dcc2ab4eddb0e93b69afe.tar.gz kernel-qcow2-linux-132a324ab62fe4fb8d6dcc2ab4eddb0e93b69afe.tar.xz kernel-qcow2-linux-132a324ab62fe4fb8d6dcc2ab4eddb0e93b69afe.zip | |
KVM: arm64: vgic-v3: Add ICV_IAR1_EL1 handler
Add a handler for reading the guest's view of the ICC_IAR1_EL1
register. This involves finding the highest priority Group-1
interrupt, checking against both PMR and the active group
priority, activating the interrupt and setting the group
priority as active.
Tested-by: Alexander Graf <agraf@suse.de>
Acked-by: David Daney <david.daney@cavium.com>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Diffstat (limited to 'include/linux/irqchip/arm-gic-v3.h')
| -rw-r--r-- | include/linux/irqchip/arm-gic-v3.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index 1fa293a37f4a..d70668fae003 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -405,6 +405,7 @@ #define ICH_LR_PHYS_ID_SHIFT 32 #define ICH_LR_PHYS_ID_MASK (0x3ffULL << ICH_LR_PHYS_ID_SHIFT) #define ICH_LR_PRIORITY_SHIFT 48 +#define ICH_LR_PRIORITY_MASK (0xffULL << ICH_LR_PRIORITY_SHIFT) /* These are for GICv2 emulation only */ #define GICH_LR_VIRTUALID (0x3ffUL << 0) |