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| author | Saeed Mahameed | 2019-07-04 22:40:32 +0200 |
|---|---|---|
| committer | Saeed Mahameed | 2019-07-04 22:42:59 +0200 |
| commit | e08a976a16cafc20931db1d17aed9183202bfa8d (patch) | |
| tree | f2bfbc7013305d65f5647d4f8ec7fbd325a93b0a /include/linux/mlx5/eswitch.h | |
| parent | net: ethernet: mediatek: Fix overlapping capability bits. (diff) | |
| parent | net/mlx5: Add rts2rts_qp_counters_set_id field in hca cap (diff) | |
| download | kernel-qcow2-linux-e08a976a16cafc20931db1d17aed9183202bfa8d.tar.gz kernel-qcow2-linux-e08a976a16cafc20931db1d17aed9183202bfa8d.tar.xz kernel-qcow2-linux-e08a976a16cafc20931db1d17aed9183202bfa8d.zip | |
Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux
Misc updates from mlx5-next branch:
1) Add the required HW definitions and structures for upcoming TLS
support.
2) Add support for MCQI and MCQS hardware registers for fw version query.
3) Added hardware bits and structures definitions for sub-functions
4) Small code cleanup and improvement for PF pci driver.
5) Bluefield (ECPF) updates and refactoring for better E-Switch
management on ECPF embedded CPU NIC:
5.1) Consolidate querying eswitch number of VFs
5.2) Register event handler at the correct E-Switch init stage
5.3) Setup PF's inline mode and vlan pop when the ECPF is the
E-Swtich manager ( the host PF is basically a VF ).
5.4) Handle Vport UC address changes in switchdev mode.
6) Cleanup the rep and netdev reference when unloading IB rep.
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
i# All conflicts fixed but you are still merging.
Diffstat (limited to 'include/linux/mlx5/eswitch.h')
| -rw-r--r-- | include/linux/mlx5/eswitch.h | 11 |
1 files changed, 8 insertions, 3 deletions
diff --git a/include/linux/mlx5/eswitch.h b/include/linux/mlx5/eswitch.h index 091e25881f52..46b5ba029802 100644 --- a/include/linux/mlx5/eswitch.h +++ b/include/linux/mlx5/eswitch.h @@ -12,9 +12,9 @@ #define MLX5_ESWITCH_MANAGER(mdev) MLX5_CAP_GEN(mdev, eswitch_manager) enum { - SRIOV_NONE, - SRIOV_LEGACY, - SRIOV_OFFLOADS + MLX5_ESWITCH_NONE, + MLX5_ESWITCH_LEGACY, + MLX5_ESWITCH_OFFLOADS }; enum { @@ -46,6 +46,8 @@ struct mlx5_eswitch_rep { u16 vport; u8 hw_id[ETH_ALEN]; u16 vlan; + /* Only IB rep is using vport_index */ + u16 vport_index; u32 vlan_refcount; }; @@ -64,6 +66,8 @@ struct mlx5_flow_handle * mlx5_eswitch_add_send_to_vport_rule(struct mlx5_eswitch *esw, u16 vport_num, u32 sqn); +u16 mlx5_eswitch_get_total_vports(const struct mlx5_core_dev *dev); + #ifdef CONFIG_MLX5_ESWITCH enum devlink_eswitch_encap_mode mlx5_eswitch_get_encap_mode(const struct mlx5_core_dev *dev); @@ -91,4 +95,5 @@ mlx5_eswitch_get_vport_metadata_for_match(const struct mlx5_eswitch *esw, return 0; }; #endif /* CONFIG_MLX5_ESWITCH */ + #endif |