diff options
| author | Saeed Mahameed | 2015-12-01 17:03:19 +0100 |
|---|---|---|
| committer | David S. Miller | 2015-12-03 18:08:46 +0100 |
| commit | 495716b191f607b2cb2175f7499966daef79f663 (patch) | |
| tree | 1dd6be22aafd57d6be6b86c67f620d40f8cb1b02 /include/linux/mlx5/mlx5_ifc.h | |
| parent | net/mlx5: Introducing E-Switch and l2 table (diff) | |
| download | kernel-qcow2-linux-495716b191f607b2cb2175f7499966daef79f663.tar.gz kernel-qcow2-linux-495716b191f607b2cb2175f7499966daef79f663.tar.xz kernel-qcow2-linux-495716b191f607b2cb2175f7499966daef79f663.zip | |
net/mlx5: E-Switch, Introduce FDB hardware capabilities
Define needed hardware structures and capabilities needed
for E-Switch FDB flow tables and read them on driver load.
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/linux/mlx5/mlx5_ifc.h')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 39487d0c305d..ae7c08adba4a 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -447,6 +447,18 @@ struct mlx5_ifc_flow_table_nic_cap_bits { u8 reserved_3[0x7200]; }; +struct mlx5_ifc_flow_table_eswitch_cap_bits { + u8 reserved_0[0x200]; + + struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_nic_esw_fdb; + + struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_ingress; + + struct mlx5_ifc_flow_table_prop_layout_bits flow_table_properties_esw_acl_egress; + + u8 reserved_1[0x7800]; +}; + struct mlx5_ifc_per_protocol_networking_offload_caps_bits { u8 csum_cap[0x1]; u8 vlan_cap[0x1]; @@ -1846,6 +1858,7 @@ union mlx5_ifc_hca_cap_union_bits { struct mlx5_ifc_roce_cap_bits roce_cap; struct mlx5_ifc_per_protocol_networking_offload_caps_bits per_protocol_networking_offload_caps; struct mlx5_ifc_flow_table_nic_cap_bits flow_table_nic_cap; + struct mlx5_ifc_flow_table_eswitch_cap_bits flow_table_eswitch_cap; u8 reserved_0[0x8000]; }; |