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| author | Daniel Jurgens | 2018-11-05 23:05:37 +0100 |
|---|---|---|
| committer | Saeed Mahameed | 2018-12-11 23:52:20 +0100 |
| commit | 939de57d30344ce728b0de61be87984e75af420e (patch) | |
| tree | dc42835752a817f639508f23b45b1601fd644861 /include/linux/mlx5/mlx5_ifc.h | |
| parent | net/mlx5e: Support multiple encapsulations for a TC flow (diff) | |
| download | kernel-qcow2-linux-939de57d30344ce728b0de61be87984e75af420e.tar.gz kernel-qcow2-linux-939de57d30344ce728b0de61be87984e75af420e.tar.xz kernel-qcow2-linux-939de57d30344ce728b0de61be87984e75af420e.zip | |
net/mlx5e: Use CQE padding for Ethernet CQs
Writing 64B CQEs to 128B cache lines results in a RMW operation. Padding
the CQEs to 128B if possible improves performance on 128B cache line
systems like PPC.
Testing on PPC showed up to a 24% improvement in small packet throughput
vs the default behavior, depending on the workload and system topology.
Signed-off-by: Daniel Jurgens <danielj@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'include/linux/mlx5/mlx5_ifc.h')
0 files changed, 0 insertions, 0 deletions