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| author | Kevin Liu | 2012-10-17 13:04:46 +0200 |
|---|---|---|
| committer | Chris Ball | 2012-12-06 19:54:46 +0100 |
| commit | ed9dbb6effc3516a1211a936be9bd67c03fdf858 (patch) | |
| tree | 27be9f4aff057f6e74007d71f940558766695b98 /include/linux/mmc | |
| parent | mmc: sdhci-pxav3: Add base clock quirk (diff) | |
| download | kernel-qcow2-linux-ed9dbb6effc3516a1211a936be9bd67c03fdf858.tar.gz kernel-qcow2-linux-ed9dbb6effc3516a1211a936be9bd67c03fdf858.tar.xz kernel-qcow2-linux-ed9dbb6effc3516a1211a936be9bd67c03fdf858.zip | |
mmc: host: Make UHS timing values fully unique
Both of MMC_TIMING_LEGACY and MMC_TIMING_UHS_SDR12 are defined
to 0. And ios->timing is set to MMC_TIMING_LEGACY during power up.
But set_ios can't distinguish these two timing if host support
spec 3.0. Just adjust timing values to be different can resolve
this issue without any other impact.
Reviewed-by: Girish K S <girish.shivananjappa@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Kevin Liu <kliu5@marvell.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Diffstat (limited to 'include/linux/mmc')
| -rw-r--r-- | include/linux/mmc/host.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 37442b288ee8..23df21e5826b 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -53,12 +53,12 @@ struct mmc_ios { #define MMC_TIMING_LEGACY 0 #define MMC_TIMING_MMC_HS 1 #define MMC_TIMING_SD_HS 2 -#define MMC_TIMING_UHS_SDR12 MMC_TIMING_LEGACY -#define MMC_TIMING_UHS_SDR25 MMC_TIMING_SD_HS -#define MMC_TIMING_UHS_SDR50 3 -#define MMC_TIMING_UHS_SDR104 4 -#define MMC_TIMING_UHS_DDR50 5 -#define MMC_TIMING_MMC_HS200 6 +#define MMC_TIMING_UHS_SDR12 3 +#define MMC_TIMING_UHS_SDR25 4 +#define MMC_TIMING_UHS_SDR50 5 +#define MMC_TIMING_UHS_SDR104 6 +#define MMC_TIMING_UHS_DDR50 7 +#define MMC_TIMING_MMC_HS200 8 #define MMC_SDR_MODE 0 #define MMC_1_2V_DDR_MODE 1 |