diff options
| author | Laurent Pinchart | 2017-06-27 12:18:38 +0200 |
|---|---|---|
| committer | Laurent Pinchart | 2017-08-03 15:17:24 +0200 |
| commit | f4112469cdb6da24621db7911b33a0ea5138da03 (patch) | |
| tree | 626f875b2c838eb9422754cd42f31ecee29da12b /include/memory | |
| parent | drm: rcar-du: Configure DPAD0 routing through last group on Gen3 (diff) | |
| download | kernel-qcow2-linux-f4112469cdb6da24621db7911b33a0ea5138da03.tar.gz kernel-qcow2-linux-f4112469cdb6da24621db7911b33a0ea5138da03.tar.xz kernel-qcow2-linux-f4112469cdb6da24621db7911b33a0ea5138da03.zip | |
drm: rcar-du: Setup planes before enabling CRTC to avoid flicker
Commit 52055bafa1ff ("drm: rcar-du: Move plane commit code from CRTC
start to CRTC resume") changed the order of the plane commit and CRTC
enable operations to accommodate the runtime PM requirements. However,
this introduced corruption in the first displayed frame, as the CRTC is
now enabled without any plane configured. On Gen2 hardware the first
frame will be black and likely unnoticed, but on Gen3 hardware we end up
starting the display before the VSP compositor, which is more
noticeable.
To fix this, revert the order of the commit operations back, and handle
runtime PM requirements in the CRTC .atomic_begin() and .atomic_enable()
helper operation handlers.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Diffstat (limited to 'include/memory')
0 files changed, 0 insertions, 0 deletions