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authorAndi Kleen2015-05-10 21:22:42 +0200
committerIngo Molnar2015-08-04 10:16:57 +0200
commit71ef3c6b9d4665ee7afbbe4c208a98917dcfc32f (patch)
tree821dbc9d7c99191ce6d3027da537838966a209f9 /include/uapi/linux/perf_event.h
parentx86: Add new MSRs and MSR bits used for Intel Skylake PMU support (diff)
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perf: Add cycles to branch_info
Intel Skylake supports reporting the time in cycles a branch in the LBR took, to give a rough indication of the basic block performance. Export the cycle information in the branch_info structure. This can be done by just reusing some currently zero padding. This is just the generic header change. The architecture still needs to fill it in. There's no attempt to convert to real time, as we really want cycles here. Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: eranian@google.com Link: http://lkml.kernel.org/r/1431285767-27027-5-git-send-email-andi@firstfloor.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'include/uapi/linux/perf_event.h')
-rw-r--r--include/uapi/linux/perf_event.h4
1 files changed, 3 insertions, 1 deletions
diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
index 022d0acf7df0..2881145cda86 100644
--- a/include/uapi/linux/perf_event.h
+++ b/include/uapi/linux/perf_event.h
@@ -951,6 +951,7 @@ union perf_mem_data_src {
*
* in_tx: running in a hardware transaction
* abort: aborting a hardware transaction
+ * cycles: cycles from last branch (or 0 if not supported)
*/
struct perf_branch_entry {
__u64 from;
@@ -959,7 +960,8 @@ struct perf_branch_entry {
predicted:1,/* target predicted */
in_tx:1, /* in transaction */
abort:1, /* transaction abort */
- reserved:60;
+ cycles:16, /* cycle count to last branch */
+ reserved:44;
};
#endif /* _UAPI_LINUX_PERF_EVENT_H */