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| author | Alexander Duyck | 2017-10-12 20:38:45 +0200 |
|---|---|---|
| committer | David S. Miller | 2017-10-16 21:53:23 +0200 |
| commit | 32302902ff093891d8e64439cbb8ceae83e21ef8 (patch) | |
| tree | 8108c281c4598db6ce506e86bdbc1d7f0dde4f55 /include/uapi/linux | |
| parent | Merge tag 'mlx5-updates-2017-10-11' of git://git.kernel.org/pub/scm/linux/ker... (diff) | |
| download | kernel-qcow2-linux-32302902ff093891d8e64439cbb8ceae83e21ef8.tar.gz kernel-qcow2-linux-32302902ff093891d8e64439cbb8ceae83e21ef8.tar.xz kernel-qcow2-linux-32302902ff093891d8e64439cbb8ceae83e21ef8.zip | |
mqprio: Reserve last 32 classid values for HW traffic classes and misc IDs
This patch makes a slight tweak to mqprio in order to bring the
classid values used back in line with what is used for mq. The general idea
is to reserve values :ffe0 - :ffef to identify hardware traffic classes
normally reported via dev->num_tc. By doing this we can maintain a
consistent behavior with mq for classid where :1 - :ffdf will represent a
physical qdisc mapped onto a Tx queue represented by classid - 1, and the
traffic classes will be mapped onto a known subset of classid values
reserved for our virtual qdiscs.
Note I reserved the range from :fff0 - :ffff since this way we might be
able to reuse these classid values with clsact and ingress which would mean
that for mq, mqprio, ingress, and clsact we should be able to maintain a
similar classid layout.
Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Tested-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'include/uapi/linux')
| -rw-r--r-- | include/uapi/linux/pkt_sched.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/uapi/linux/pkt_sched.h b/include/uapi/linux/pkt_sched.h index e95b5c9b9fad..e7cc3d3c7421 100644 --- a/include/uapi/linux/pkt_sched.h +++ b/include/uapi/linux/pkt_sched.h @@ -74,6 +74,7 @@ struct tc_estimator { #define TC_H_INGRESS (0xFFFFFFF1U) #define TC_H_CLSACT TC_H_INGRESS +#define TC_H_MIN_PRIORITY 0xFFE0U #define TC_H_MIN_INGRESS 0xFFF2U #define TC_H_MIN_EGRESS 0xFFF3U |