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authorViresh Kumar2011-03-03 11:17:21 +0100
committerVinod Koul2011-03-06 20:42:28 +0100
commitb0c3130d69bda5cd91aa3b3f08e7878df49fde69 (patch)
treea75091d3489cc2db2a806cd30d0ef6f80419e86d /include
parentdw_dmac: Mark all tx_descriptors with DMA_CRTL_ACK after xfer finish (diff)
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dw_dmac: Pass Channel Allocation Order from platform_data
In SPEAr Platform channels 4-7 have more Fifo depth. So we must get better channel first. This patch introduces concept of channel allocation order in dw_dmac. If user doesn't pass anything or 0, than normal (ascending) channel allocation will follow, else channels will be allocated in descending order. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'include')
-rw-r--r--include/linux/dw_dmac.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/linux/dw_dmac.h b/include/linux/dw_dmac.h
index deec66b37180..a18c498984d9 100644
--- a/include/linux/dw_dmac.h
+++ b/include/linux/dw_dmac.h
@@ -22,6 +22,9 @@
struct dw_dma_platform_data {
unsigned int nr_channels;
bool is_private;
+#define CHAN_ALLOCATION_ASCENDING 0 /* zero to seven */
+#define CHAN_ALLOCATION_DESCENDING 1 /* seven to zero */
+ unsigned char chan_allocation_order;
};
/**