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| author | Will Deacon | 2015-03-31 15:11:24 +0200 |
|---|---|---|
| committer | Will Deacon | 2015-07-27 16:28:51 +0200 |
| commit | c8366ba0fb65063b6b4f69c7af1ea74152435590 (patch) | |
| tree | 5e1b7a728baa9428185c8339d33344cf35037b8d /init | |
| parent | arm64: bitops: patch in lse instructions when supported by the CPU (diff) | |
| download | kernel-qcow2-linux-c8366ba0fb65063b6b4f69c7af1ea74152435590.tar.gz kernel-qcow2-linux-c8366ba0fb65063b6b4f69c7af1ea74152435590.tar.xz kernel-qcow2-linux-c8366ba0fb65063b6b4f69c7af1ea74152435590.zip | |
arm64: xchg: patch in lse instructions when supported by the CPU
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of our xchg primitives so that
the LSE swp instruction (yes, you read right!) is used instead.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'init')
0 files changed, 0 insertions, 0 deletions